]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: renesas: r8a77980: Add WWDT nodes
authorWolfram Sang <wsa+renesas@sang-engineering.com>
Mon, 15 Dec 2025 03:47:16 +0000 (12:47 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 5 Jan 2026 13:37:18 +0000 (14:37 +0100)
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251215034715.3406-10-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r8a77980.dtsi

index 0e81bef180a068a9b749dfd01c4b4a23b057bc51..86b7792d68fac659774d6a4bd496a4e286169660 100644 (file)
                        };
                };
 
+               wwdt0: watchdog@ffc90000 {
+                       compatible = "renesas,r8a77980-wwdt",
+                                    "renesas,rcar-gen3-wwdt";
+                       reg = <0 0xffc90000 0 0x10>;
+                       interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pretimeout", "error";
+                       clocks = <&cpg CPG_CORE R8A77980_CLK_R>,
+                                <&cpg CPG_CORE R8A77980_CLK_CP>;
+                       clock-names = "cnt", "bus";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 325>;
+                       reset-names = "cnt";
+                       status = "disabled";
+               };
+
+               wwdt1: watchdog@ffca0000 {
+                       compatible = "renesas,r8a77980-wwdt",
+                                    "renesas,rcar-gen3-wwdt";
+                       reg = <0 0xffca0000 0 0x10>;
+                       interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pretimeout", "error";
+                       clocks = <&cpg CPG_CORE R8A77980_CLK_R>,
+                                <&cpg CPG_CORE R8A77980_CLK_CP>;
+                       clock-names = "cnt", "bus";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 324>;
+                       reset-names = "cnt";
+                       status = "disabled";
+               };
+
+               wwdt2: watchdog@ffcb0000 {
+                       compatible = "renesas,r8a77980-wwdt",
+                                    "renesas,rcar-gen3-wwdt";
+                       reg = <0 0xffcb0000 0 0x10>;
+                       interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pretimeout", "error";
+                       clocks = <&cpg CPG_CORE R8A77980_CLK_R>,
+                                <&cpg CPG_CORE R8A77980_CLK_CP>;
+                       clock-names = "cnt", "bus";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 321>;
+                       reset-names = "cnt";
+                       status = "disabled";
+               };
+
+               wwdt3: watchdog@ffcc0000 {
+                       compatible = "renesas,r8a77980-wwdt",
+                                    "renesas,rcar-gen3-wwdt";
+                       reg = <0 0xffcc0000 0 0x10>;
+                       interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pretimeout", "error";
+                       clocks = <&cpg CPG_CORE R8A77980_CLK_R>,
+                                <&cpg CPG_CORE R8A77980_CLK_CP>;
+                       clock-names = "cnt", "bus";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 309>;
+                       reset-names = "cnt";
+                       status = "disabled";
+               };
+
+               wwdt4: watchdog@ffcf0000 {
+                       compatible = "renesas,r8a77980-wwdt",
+                                    "renesas,rcar-gen3-wwdt";
+                       reg = <0 0xffcf0000 0 0x10>;
+                       interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pretimeout", "error";
+                       clocks = <&cpg CPG_CORE R8A77980_CLK_R>,
+                                <&cpg CPG_CORE R8A77980_CLK_CP>;
+                       clock-names = "cnt", "bus";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 403>;
+                       reset-names = "cnt";
+                       status = "disabled";
+               };
+
                prr: chipid@fff00044 {
                        compatible = "renesas,prr";
                        reg = <0 0xfff00044 0 4>;