]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
wifi: mt76: mt7996: Do not schedule RRO and TxFree queues during reset for NPU
authorLorenzo Bianconi <lorenzo@kernel.org>
Thu, 22 Jan 2026 10:39:59 +0000 (11:39 +0100)
committerFelix Fietkau <nbd@nbd.name>
Mon, 23 Mar 2026 09:23:01 +0000 (09:23 +0000)
This is a preliminary patch to properly manage reset procedure when NPU
offloading is enabled.

Tested-by: Kang Yang <kang.yang@airoha.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://patch.msgid.link/20260122-mt76-npu-eagle-offload-v2-15-2374614c0de6@kernel.org
Signed-off-by: Felix Fietkau <nbd@nbd.name>
drivers/net/wireless/mediatek/mt76/dma.c
drivers/net/wireless/mediatek/mt76/mt76.h
drivers/net/wireless/mediatek/mt76/mt7996/dma.c
drivers/net/wireless/mediatek/mt76/mt7996/mac.c

index f5c6bb94ccbbda6afe03b24cf245b30c797e855d..2d133ace7c33ac5492e287a53510ee4b6a6b7403 100644 (file)
@@ -881,6 +881,10 @@ mt76_dma_rx_cleanup(struct mt76_dev *dev, struct mt76_queue *q)
                    mt76_queue_is_wed_rro(q))
                        continue;
 
+               if (mt76_npu_device_active(dev) &&
+                   mt76_queue_is_wed_rro(q))
+                       continue;
+
                if (!mt76_queue_is_wed_rro_rxdmad_c(q) &&
                    !mt76_queue_is_wed_rro_ind(q))
                        mt76_put_page_pool_buf(buf, false);
@@ -923,6 +927,13 @@ mt76_dma_rx_reset(struct mt76_dev *dev, enum mt76_rxq_id qid)
            mt76_queue_is_wed_rro(q))
                return;
 
+       if (mt76_npu_device_active(dev) &&
+           mt76_queue_is_wed_rro(q))
+               return;
+
+       if (mt76_queue_is_npu_txfree(q))
+               return;
+
        mt76_dma_sync_idx(dev, q);
        if (mt76_queue_is_npu(q))
                mt76_npu_fill_rx_queue(dev, q);
index eefc3f555f8afea2af67517683d522b657e20b7b..5e68efc367fce63bcc60a8792e6f9d118283e3ed 100644 (file)
@@ -55,6 +55,8 @@
                                 FIELD_PREP(MT_QFLAG_WED_RING, _n))
 #define MT_NPU_Q_TX(_n)                __MT_NPU_Q(MT76_WED_Q_TX, _n)
 #define MT_NPU_Q_RX(_n)                __MT_NPU_Q(MT76_WED_Q_RX, _n)
+#define MT_NPU_Q_TXFREE(_n)    (FIELD_PREP(MT_QFLAG_WED_TYPE, MT76_WED_Q_TXFREE) | \
+                                FIELD_PREP(MT_QFLAG_WED_RING, _n))
 
 struct mt76_dev;
 struct mt76_phy;
@@ -2003,6 +2005,14 @@ static inline bool mt76_queue_is_npu_rx(struct mt76_queue *q)
               FIELD_GET(MT_QFLAG_WED_TYPE, q->flags) == MT76_WED_Q_RX;
 }
 
+static inline bool mt76_queue_is_npu_txfree(struct mt76_queue *q)
+{
+       if (q->flags & MT_QFLAG_WED)
+               return false;
+
+       return FIELD_GET(MT_QFLAG_WED_TYPE, q->flags) == MT76_WED_Q_TXFREE;
+}
+
 struct mt76_txwi_cache *
 mt76_token_release(struct mt76_dev *dev, int token, bool *wake);
 int mt76_token_consume(struct mt76_dev *dev, struct mt76_txwi_cache **ptxwi);
index 1a4f5f5b2a8435933070bb7d8feab26a0c174922..8f5d297dafce23dcb3c1e53678f8d67dab9e8987 100644 (file)
@@ -756,6 +756,9 @@ int mt7996_dma_init(struct mt7996_dev *dev)
             (is_mt7992(&dev->mt76)))) {
                dev->mt76.q_rx[MT_RXQ_MAIN_WA].flags = MT_WED_Q_TXFREE;
                dev->mt76.q_rx[MT_RXQ_MAIN_WA].wed = wed;
+       } else if (is_mt7992(&dev->mt76) &&
+                  mt76_npu_device_active(&dev->mt76)) {
+               dev->mt76.q_rx[MT_RXQ_MAIN_WA].flags = MT_NPU_Q_TXFREE(0);
        }
 
        if (mt7996_has_wa(dev)) {
@@ -888,6 +891,8 @@ int mt7996_dma_init(struct mt7996_dev *dev)
                                /* tx free notify event from WA for band0 */
                                dev->mt76.q_rx[MT_RXQ_TXFREE_BAND0].flags = MT_WED_Q_TXFREE;
                                dev->mt76.q_rx[MT_RXQ_TXFREE_BAND0].wed = wed;
+                       } else if (mt76_npu_device_active(&dev->mt76)) {
+                               dev->mt76.q_rx[MT_RXQ_TXFREE_BAND0].flags = MT_NPU_Q_TXFREE(0);
                        }
 
                        ret = mt76_queue_alloc(dev,
index 7bee97ff71df1515905303352674c6a0e403c435..c8cfc343d37bfd62f02294582d9ef47aece068c3 100644 (file)
@@ -2525,6 +2525,13 @@ void mt7996_mac_reset_work(struct work_struct *work)
                    mt76_queue_is_wed_rro(&dev->mt76.q_rx[i]))
                        continue;
 
+               if (mt76_npu_device_active(&dev->mt76) &&
+                   mt76_queue_is_wed_rro(&dev->mt76.q_rx[i]))
+                       continue;
+
+               if (mt76_queue_is_npu_txfree(&dev->mt76.q_rx[i]))
+                       continue;
+
                napi_disable(&dev->mt76.napi[i]);
        }
        napi_disable(&dev->mt76.tx_napi);
@@ -2580,6 +2587,13 @@ void mt7996_mac_reset_work(struct work_struct *work)
                    mt76_queue_is_wed_rro(&dev->mt76.q_rx[i]))
                        continue;
 
+               if (mt76_npu_device_active(&dev->mt76) &&
+                   mt76_queue_is_wed_rro(&dev->mt76.q_rx[i]))
+                       continue;
+
+               if (mt76_queue_is_npu_txfree(&dev->mt76.q_rx[i]))
+                       continue;
+
                napi_enable(&dev->mt76.napi[i]);
                local_bh_disable();
                napi_schedule(&dev->mt76.napi[i]);