arm: [MVE intrinsics] rework sqrshrl sqrshrl_sat48

Implement sqrshrl and sqrshrl_sat48 using the new MVE builtins
framework.

gcc/ChangeLog:
	* config/arm/arm-mve-builtins-base.cc (enum which_scalar_shift):
	Add ss_SQRSHRL, ss_SQRSHRL_SAT48.
	(mve_function_scalar_shift): Add support for ss_SQRSHRL,
	ss_SQRSHRL_SAT48.
	(sqrshrl, sqrshrl_sat48): New.
	* config/arm/arm-mve-builtins-base.def (sqrshrl, sqrshrl_sat48): New.
	* config/arm/arm-mve-builtins-base.h (sqrshrl, sqrshrl_sat48): New.
	* config/arm/arm_mve.h (sqrshrl): Delete.
	(sqrshrl_sat48): Delete.
	(__arm_sqrshrl): Delete.
	(__arm_sqrshrl_sat48): Delete.
	* config/arm/mve.md (mve_sqrshrl_sat<supf>_di): Add '@' prefix.

diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc
index 3a450f11468d94ef77899c9cc36056231a2c4fd2..d2989044dd3872a909f5479c9670011d6ccd60e2 100644 (file)
--- a/gcc/config/arm/arm-mve-builtins-base.cc
+++ b/gcc/config/arm/arm-mve-builtins-base.cc
@@ -1172,6 +1172,8 @@ public:
 enum which_scalar_shift {
   ss_ASRL,
   ss_LSLL,
+  ss_SQRSHRL,
+  ss_SQRSHRL_SAT48,
   ss_UQRSHLL,
   ss_UQRSHLL_SAT48,
 };
@@ -1203,6 +1205,14 @@ public:
        code = CODE_FOR_mve_lsll;
        break;
 
+      case ss_SQRSHRL:
+       code = code_for_mve_sqrshrl_sat_di (SQRSHRL_64);
+       break;
+
+      case ss_SQRSHRL_SAT48:
+       code = code_for_mve_sqrshrl_sat_di (SQRSHRL_48);
+       break;
+
       case ss_UQRSHLL:
        code = code_for_mve_uqrshll_sat_di (UQRSHLL_64);
        break;
@@ -1407,6 +1417,8 @@ namespace arm_mve {
 
 FUNCTION (asrl, mve_function_scalar_shift, (ss_ASRL))
 FUNCTION (lsll, mve_function_scalar_shift, (ss_LSLL))
+FUNCTION (sqrshrl, mve_function_scalar_shift, (ss_SQRSHRL))
+FUNCTION (sqrshrl_sat48, mve_function_scalar_shift, (ss_SQRSHRL_SAT48))
 FUNCTION (uqrshll, mve_function_scalar_shift, (ss_UQRSHLL))
 FUNCTION (uqrshll_sat48, mve_function_scalar_shift, (ss_UQRSHLL_SAT48))
 FUNCTION_PRED_P_S_U (vabavq, VABAVQ)

diff --git a/gcc/config/arm/arm-mve-builtins-base.def b/gcc/config/arm/arm-mve-builtins-base.def
index 84a77252b8556960257fabb2fde3883d4963e82e..fdeb7411e757d5d1fe2993e1de1e891456daf97e 100644 (file)
--- a/gcc/config/arm/arm-mve-builtins-base.def
+++ b/gcc/config/arm/arm-mve-builtins-base.def
@@ -20,6 +20,8 @@
 #define REQUIRES_FLOAT false
 DEF_MVE_FUNCTION (asrl, scalar_s64_shift, none, none)
 DEF_MVE_FUNCTION (lsll, scalar_u64_shift, none, none)
+DEF_MVE_FUNCTION (sqrshrl, scalar_s64_shift, none, none)
+DEF_MVE_FUNCTION (sqrshrl_sat48, scalar_s64_shift, none, none)
 DEF_MVE_FUNCTION (uqrshll, scalar_u64_shift, none, none)
 DEF_MVE_FUNCTION (uqrshll_sat48, scalar_u64_shift, none, none)
 DEF_MVE_FUNCTION (vabavq, binary_acca_int32, all_integer, p_or_none)

diff --git a/gcc/config/arm/arm-mve-builtins-base.h b/gcc/config/arm/arm-mve-builtins-base.h
index 5b8cb6e95a6138945bf4fda929e1b7d553852c72..dfec21936724fee9480dfa824a3a9ef6a4dab7a0 100644 (file)
--- a/gcc/config/arm/arm-mve-builtins-base.h
+++ b/gcc/config/arm/arm-mve-builtins-base.h
@@ -25,6 +25,8 @@ namespace functions {
 
 extern const function_base *const asrl;
 extern const function_base *const lsll;
+extern const function_base *const sqrshrl;
+extern const function_base *const sqrshrl_sat48;
 extern const function_base *const uqrshll;
 extern const function_base *const uqrshll_sat48;
 extern const function_base *const vabavq;

diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
index 2f43fd72a2bb38ff6bfcd9b4ba380724dcee62a7..5a12d982c50acff142b766d411ff809d37fdb5e8 100644 (file)
--- a/gcc/config/arm/arm_mve.h
+++ b/gcc/config/arm/arm_mve.h
@@ -81,8 +81,6 @@
 #define vgetq_lane_u32(__a,  __idx) __arm_vgetq_lane_u32(__a,  __idx)
 #define vgetq_lane_u64(__a,  __idx) __arm_vgetq_lane_u64(__a,  __idx)
 #define sqrshr(__p0, __p1) __arm_sqrshr(__p0, __p1)
-#define sqrshrl(__p0, __p1) __arm_sqrshrl(__p0, __p1)
-#define sqrshrl_sat48(__p0, __p1) __arm_sqrshrl_sat48(__p0, __p1)
 #define sqshl(__p0, __p1) __arm_sqshl(__p0, __p1)
 #define sqshll(__p0, __p1) __arm_sqshll(__p0, __p1)
 #define srshr(__p0, __p1) __arm_srshr(__p0, __p1)
@@ -242,20 +240,6 @@ __arm_vgetq_lane_u64 (uint64x2_t __a, const int __idx)
   return __a[__ARM_LANEQ(__a,__idx)];
 }
 
-__extension__ extern __inline int64_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_sqrshrl (int64_t value, int32_t shift)
-{
-  return __builtin_mve_sqrshrl_sat64_di (value, shift);
-}
-
-__extension__ extern __inline int64_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_sqrshrl_sat48 (int64_t value, int32_t shift)
-{
-  return __builtin_mve_sqrshrl_sat48_di (value, shift);
-}
-
 __extension__ extern __inline uint64_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 __arm_uqshll (uint64_t value, const int shift)

diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index 434194d51113775a8160ed9ab76b66cec1c3c7bd..b416d0c873c988302ec6da6b8c820b786d1caecf 100644 (file)
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -4290,7 +4290,7 @@
 ;;
 ;; [sqrshrl_di]
 ;;
-(define_insn "mve_sqrshrl_sat<supf>_di"
+(define_insn "@mve_sqrshrl_sat<supf>_di"
   [(set (match_operand:DI 0 "arm_low_register_operand" "=l")
        (unspec:DI [(match_operand:DI 1 "arm_low_register_operand" "0")
                    (match_operand:SI 2 "register_operand" "r")]