]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
pinctrl: qcom: Unconditionally mark gpio as wakeup enable
authorSneh Mankad <sneh.mankad@oss.qualcomm.com>
Tue, 16 Jun 2026 11:54:53 +0000 (17:24 +0530)
committerBartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Tue, 30 Jun 2026 14:51:33 +0000 (16:51 +0200)
GPIO interrupts that are wakeup capable need to be forwarded to wakeup
capable parent irqchip. This is done via writing to it's wakeup_enable bit.

Currently the bit is set only for PDC irqchip by checking skip_wake_irqs.
skip_wake_irqs is set to differentiate between parent irqchips MPM and
PDC. It is set when the parent irqchip is PDC to inform pinctrl about
skipping the IRQ setting up at TLMM.

However, the functionality to forward GPIO interrupts during SoC low
power mode is needed regardless of which parent irqchip it is.
Without the functionality it is impossible for MPM irqchip to detect the
GPIO interrupt during SoC low power mode since for MPM irqchip the
skip_wake_irqs is always false.

Remove skip_wake_irqs condition when setting wakeup enable bit to allow
forwarding GPIO interrupts for SoCs using MPM irqchip too.

Fixes: 76b446f5b86e ("pinctrl: qcom: handle intr_target_reg wakeup_present/enable bits")
Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com>
Reviewed-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://patch.msgid.link/20260616-enable_wakeup_capable_gpios-v3-1-fb59647d89cb@oss.qualcomm.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
drivers/pinctrl/qcom/pinctrl-msm.c

index 11db6564c44dfeeb637dff5cf9c24831497c3394..fd0add4e71da14d6e74b0517e1015926c6c15d1b 100644 (file)
@@ -1240,12 +1240,12 @@ static int msm_gpio_irq_reqres(struct irq_data *d)
        /*
         * If the wakeup_enable bit is present and marked as available for the
         * requested GPIO, it should be enabled when the GPIO is marked as
-        * wake irq in order to allow the interrupt event to be transfered to
-        * the PDC HW.
+        * wake irq in order to allow the interrupt event to be transferred to
+        * the PDC/MPM HW.
         * While the name implies only the wakeup event, it's also required for
         * the interrupt event.
         */
-       if (test_bit(d->hwirq, pctrl->skip_wake_irqs) && g->intr_wakeup_present_bit) {
+       if (g->intr_wakeup_present_bit) {
                u32 intr_cfg;
 
                raw_spin_lock_irqsave(&pctrl->lock, flags);
@@ -1273,7 +1273,7 @@ static void msm_gpio_irq_relres(struct irq_data *d)
        unsigned long flags;
 
        /* Disable the wakeup_enable bit if it has been set in msm_gpio_irq_reqres() */
-       if (test_bit(d->hwirq, pctrl->skip_wake_irqs) && g->intr_wakeup_present_bit) {
+       if (g->intr_wakeup_present_bit) {
                u32 intr_cfg;
 
                raw_spin_lock_irqsave(&pctrl->lock, flags);