]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
dt-bindings: phy: Convert lantiq,ase-usb2-phy to DT schema
authorRob Herring (Arm) <robh@kernel.org>
Sat, 7 Jun 2025 21:25:36 +0000 (16:25 -0500)
committerVinod Koul <vkoul@kernel.org>
Sun, 15 Jun 2025 14:29:01 +0000 (19:59 +0530)
Convert the Lantiq XWAY USB PHY binding to DT schema format. It's a
straight forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250607212537.742287-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Documentation/devicetree/bindings/phy/lantiq,ase-usb2-phy.yaml [new file with mode: 0644]
Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt [deleted file]

diff --git a/Documentation/devicetree/bindings/phy/lantiq,ase-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/lantiq,ase-usb2-phy.yaml
new file mode 100644 (file)
index 0000000..99b5da7
--- /dev/null
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/lantiq,ase-usb2-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Lantiq XWAY SoC RCU USB 1.1/2.0 PHY
+
+maintainers:
+  - Hauke Mehrtens <hauke@hauke-m.de>
+
+description:
+  This node has to be a sub node of the Lantiq RCU block.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - lantiq,ase-usb2-phy
+          - lantiq,danube-usb2-phy
+          - lantiq,xrx100-usb2-phy
+          - lantiq,xrx200-usb2-phy
+          - lantiq,xrx300-usb2-phy
+
+  reg:
+    items:
+      - description: Offset of the USB PHY configuration register
+      - description: Offset of the USB Analog configuration register
+
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    items:
+      - const: phy
+
+  resets:
+    minItems: 1
+    maxItems: 2
+
+  reset-names:
+    minItems: 1
+    items:
+      - enum: [ phy, ctrl ]
+      - const: ctrl
+
+  '#phy-cells':
+    const: 0
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - resets
+  - reset-names
+  - '#phy-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    usb2-phy@18 {
+        compatible = "lantiq,xrx200-usb2-phy";
+        reg = <0x18 4>, <0x38 4>;
+        clocks = <&pmu 1>;
+        clock-names = "phy";
+        resets = <&reset1 4 4>, <&reset0 4 4>;
+        reset-names = "phy", "ctrl";
+        #phy-cells = <0>;
+    };
diff --git a/Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt b/Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt
deleted file mode 100644 (file)
index 643948b..0000000
+++ /dev/null
@@ -1,40 +0,0 @@
-Lantiq XWAY SoC RCU USB 1.1/2.0 PHY binding
-===========================================
-
-This binding describes the USB PHY hardware provided by the RCU module on the
-Lantiq XWAY SoCs.
-
-This node has to be a sub node of the Lantiq RCU block.
-
--------------------------------------------------------------------------------
-Required properties (controller (parent) node):
-- compatible   : Should be one of
-                       "lantiq,ase-usb2-phy"
-                       "lantiq,danube-usb2-phy"
-                       "lantiq,xrx100-usb2-phy"
-                       "lantiq,xrx200-usb2-phy"
-                       "lantiq,xrx300-usb2-phy"
-- reg          : Defines the following sets of registers in the parent
-                 syscon device
-                       - Offset of the USB PHY configuration register
-                       - Offset of the USB Analog configuration
-                         register (only for xrx200 and xrx200)
-- clocks       : References to the (PMU) "phy" clk gate.
-- clock-names  : Must be "phy"
-- resets       : References to the RCU USB configuration reset bits.
-- reset-names  : Must be one of the following:
-                       "phy" (optional)
-                       "ctrl" (shared)
-
--------------------------------------------------------------------------------
-Example for the USB PHYs on an xRX200 SoC:
-       usb_phy0: usb2-phy@18 {
-               compatible = "lantiq,xrx200-usb2-phy";
-               reg = <0x18 4>, <0x38 4>;
-
-               clocks = <&pmu PMU_GATE_USB0_PHY>;
-               clock-names = "phy";
-               resets = <&reset1 4 4>, <&reset0 4 4>;
-               reset-names = "phy", "ctrl";
-               #phy-cells = <0>;
-       };