i386: Fix operand order for @wrss<mode> and @wruss<mode> [PR124366]

These two insns were using the same operand order for both -masm=att
and -masm=intel, which is ok if using the same operand for both, but not
when they are different.

2026-03-05  Jakub Jelinek  <jakub@redhat.com>

	PR target/124366
	* config/i386/i386.md (@wrss<mode>, @wruss<mode>): Swap operand
	order for -masm=intel.

	* gcc.target/i386/cet-pr124366.c: New test.

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 660098429a2a082a575c8bb4eb8b43441878dd82..5533c6e92d3b7f78487813d717dd6968a13a6978 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -30267,7 +30267,7 @@
                     (match_operand:SWI48 1 "memory_operand" "m")]
                    UNSPECV_WRSS)]
   "TARGET_SHSTK"
-  "wrss<mskmodesuffix>\t%0, %1"
+  "wrss<mskmodesuffix>\t{%0, %1|%1, %0}"
   [(set_attr "length" "3")
    (set_attr "type" "other")])
 
@@ -30276,7 +30276,7 @@
                     (match_operand:SWI48 1 "memory_operand" "m")]
                    UNSPECV_WRUSS)]
   "TARGET_SHSTK"
-  "wruss<mskmodesuffix>\t%0, %1"
+  "wruss<mskmodesuffix>\t{%0, %1|%1, %0}"
   [(set_attr "length" "4")
    (set_attr "type" "other")])
 

diff --git a/gcc/testsuite/gcc.target/i386/cet-pr124366.c b/gcc/testsuite/gcc.target/i386/cet-pr124366.c
new file mode 100644 (file)
index 0000000..30a5282
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/cet-pr124366.c
@@ -0,0 +1,31 @@
+/* PR target/124366 */
+/* { dg-do assemble { target { cet && masm_intel } } } */
+/* { dg-options "-O2 -mshstk -masm=intel" } */
+
+#include <x86intrin.h>
+
+void
+wrssd (unsigned int x, void *y)
+{
+  _wrssd (x, y);
+}
+
+void
+wrussd (unsigned int x, void *y)
+{
+  _wrussd (x, y);
+}
+
+#ifdef __x86_64__
+void
+wrssq (unsigned long long x, void *y)
+{
+  _wrssq (x, y);
+}
+
+void
+wrussq (unsigned long long x, void *y)
+{
+  _wrussq (x, y);
+}
+#endif