arm64: zynqmp: Enable DP for kr260, kv260, zcu100, zcu102, zcu104, zcu111

Upstream DP DT binding enforcing dp-connector and port description to
operate properly.

Co-developed-by: Rohit Visavalia <rohit.visavalia@amd.com>
Signed-off-by: Rohit Visavalia <rohit.visavalia@amd.com>
Co-developed-by: Nithish Kumar Naroju <nithishkumar.naroju@amd.com>
Signed-off-by: Nithish Kumar Naroju <nithishkumar.naroju@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/15e863adca11431f68d37d732cd8a453e508ad91.1756803198.git.michal.simek@amd.com

diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
index fbacfa984d7640b3b4182a10b5e9bead9c1552ed..b92dcb86e87e9c7c36196da234130434a0271026 100644 (file)
--- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
@@ -71,6 +71,17 @@
                #clock-cells = <0>;
                clock-frequency = <25000000>;
        };
+       dpcon {
+               compatible = "dp-connector";
+               label = "P11";
+               type = "full-size";
+
+               port {
+                       dpcon_in: endpoint {
+                               remote-endpoint = <&dpsub_dp_out>;
+                       };
+               };
+       };
 };
 
 &i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */
@@ -145,6 +156,12 @@
        assigned-clock-rates = <27000000>, <25000000>, <300000000>;
 };
 
+&out_dp {
+       dpsub_dp_out: endpoint {
+               remote-endpoint = <&dpcon_in>;
+       };
+};
+
 &zynqmp_dpdma {
        status = "okay";
        assigned-clock-rates = <600000000>;

diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
index 3c36eb52e96841939f5aea07df3eaf9bd7f818ae..d7351a17d3e88d589123c7cc723b4af81393735b 100644 (file)
--- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
@@ -72,6 +72,17 @@
                #clock-cells = <0>;
                clock-frequency = <27000000>;
        };
+       dpcon {
+               compatible = "dp-connector";
+               label = "P11";
+               type = "full-size";
+
+               port {
+                       dpcon_in: endpoint {
+                               remote-endpoint = <&dpsub_dp_out>;
+                       };
+               };
+       };
 };
 
 &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
@@ -122,6 +133,12 @@
        assigned-clock-rates = <27000000>, <25000000>, <300000000>;
 };
 
+&out_dp {
+       dpsub_dp_out: endpoint {
+               remote-endpoint = <&dpcon_in>;
+       };
+};
+
 &zynqmp_dpdma {
        status = "okay";
        assigned-clock-rates = <600000000>;

diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts
index 3542844e6977f0b9f32b0029c6e63cde61e101aa..4ec8a400494e31861ba3745de2d3f45ad867215e 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu100-revC.dts
+++ b/arch/arm/dts/zynqmp-zcu100-revC.dts
@@ -134,6 +134,18 @@
                #clock-cells = <0>;
                clock-frequency = <27000000>;
        };
+
+       dpcon {
+               compatible = "dp-connector";
+               label = "P11";
+               type = "full-size";
+
+               port {
+                       dpcon_in: endpoint {
+                               remote-endpoint = <&dpsub_dp_out>;
+                       };
+               };
+       };
 };
 
 &dcc {
@@ -607,3 +619,9 @@
        phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
               <&psgtr 0 PHY_TYPE_DP 1 1>;
 };
+
+&out_dp {
+       dpsub_dp_out: endpoint {
+               remote-endpoint = <&dpcon_in>;
+       };
+};

diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts
index 955810ae7178009b0db0a42fa0ccb3ad5af4bfcf..7fa77b59906ecad87c5c5d90965e57ae88bb8c14 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu102-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revA.dts
@@ -151,6 +151,18 @@
                #clock-cells = <0>;
                clock-frequency = <114285000>;
        };
+
+       dpcon {
+               compatible = "dp-connector";
+               label = "P11";
+               type = "full-size";
+
+               port {
+                       dpcon_in: endpoint {
+                               remote-endpoint = <&dpsub_dp_out>;
+                       };
+               };
+       };
 };
 
 &can1 {
@@ -1082,3 +1094,9 @@
        phy-names = "dp-phy0";
        phys = <&psgtr 1 PHY_TYPE_DP 0 3>;
 };
+
+&out_dp {
+       dpsub_dp_out: endpoint {
+               remote-endpoint = <&dpcon_in>;
+       };
+};

diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts
index 64d822255ec54d0d818b37bd73e4740b7b7b84af..135bfa0808285c59f7f4a252700d8c81313b0d9c 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu104-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revA.dts
@@ -60,6 +60,18 @@
                #clock-cells = <0>;
                clock-frequency = <27000000>;
        };
+
+       dpcon {
+               compatible = "dp-connector";
+               label = "P11";
+               type = "full-size";
+
+               port {
+                       dpcon_in: endpoint {
+                               remote-endpoint = <&dpsub_dp_out>;
+                       };
+               };
+       };
 };
 
 &can1 {
@@ -545,3 +557,9 @@
        phys = <&psgtr 1 PHY_TYPE_DP 0 3>,
               <&psgtr 0 PHY_TYPE_DP 1 3>;
 };
+
+&out_dp {
+       dpsub_dp_out: endpoint {
+               remote-endpoint = <&dpcon_in>;
+       };
+};

diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts
index 3e883d717c2f294cdfa43b0a120bc4c806f38822..20d17a07e7ebd5f33c8c3a81f7818e27c1ccf961 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu104-revC.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revC.dts
@@ -65,6 +65,18 @@
                #clock-cells = <0>;
                clock-frequency = <27000000>;
        };
+
+       dpcon {
+               compatible = "dp-connector";
+               label = "P11";
+               type = "full-size";
+
+               port {
+                       dpcon_in: endpoint {
+                               remote-endpoint = <&dpsub_dp_out>;
+                       };
+               };
+       };
 };
 
 &can1 {
@@ -557,3 +569,9 @@
        phys = <&psgtr 1 PHY_TYPE_DP 0 3>,
               <&psgtr 0 PHY_TYPE_DP 1 3>;
 };
+
+&out_dp {
+       dpsub_dp_out: endpoint {
+               remote-endpoint = <&dpcon_in>;
+       };
+};

diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts
index 3a1580dfc400c8c20327c8b98cc7d89f82aebf21..cfb4f648767535e3dfa8a52c5488f3d89dc82341 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu111-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu111-revA.dts
@@ -129,6 +129,18 @@
                #clock-cells = <0>;
                clock-frequency = <48000000>;
        };
+
+       dpcon {
+               compatible = "dp-connector";
+               label = "P11";
+               type = "full-size";
+
+               port {
+                       dpcon_in: endpoint {
+                               remote-endpoint = <&dpsub_dp_out>;
+                       };
+               };
+       };
 };
 
 &dcc {
@@ -882,3 +894,9 @@
        phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
               <&psgtr 0 PHY_TYPE_DP 1 1>;
 };
+
+&out_dp {
+       dpsub_dp_out: endpoint {
+               remote-endpoint = <&dpcon_in>;
+       };
+};