drm/xe/sriov: Mark NVL as SR-IOV capable

Enable SR-IOV support for NVL platforms.

Signed-off-by: Jakub Kolakowski <jakub1.kolakowski@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Piotr Piórkowski <piotr.piorkowski@intel.com>
Cc: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Tomasz Lis <tomasz.lis@intel.com>
Link: https://patch.msgid.link/20260331152259.58270-1-jakub1.kolakowski@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 12d3be7f9f6c3c1853d66077776b444185be9674..1243c7d8ed10a426689dba6a681c28283ecf5e02 100644 (file)
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -444,6 +444,7 @@ static const struct xe_device_desc nvls_desc = {
        .has_display = true,
        .has_flat_ccs = 1,
        .has_pre_prod_wa = 1,
+       .has_sriov = true,
        .max_gt_per_tile = 2,
        MULTI_LRC_MASK,
        .require_force_probe = true,
@@ -482,6 +483,7 @@ static const struct xe_device_desc nvlp_desc = {
        .has_flat_ccs = 1,
        .has_page_reclaim_hw_assist = true,
        .has_pre_prod_wa = true,
+       .has_sriov = true,
        .max_gt_per_tile = 2,
        MULTI_LRC_MASK,
        .require_force_probe = true,