drm/ast: Hide Gens 1 to 3 TX detection in branch

Gen7 only supports ASTDP. Gens 4 to 6 support various TX chips,
except ASTDP. These boards detect the TX chips by reading the SoC
scratch register as VGACRD1.

Gens 1 to 3 only support SIL164. These boards read the DVO bit from
VGACRA3. Hence move this test behind a branch, so that it does not
run on later generations.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250117103450.28692-6-tzimmermann@suse.de

diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c
index 474eb255b325b536576e62cd5b92439f0832a1f8..50b57bc15d53c719c7f2db6b4c93b55f844d268f 100644 (file)
--- a/drivers/gpu/drm/ast/ast_main.c
+++ b/drivers/gpu/drm/ast/ast_main.c
@@ -96,21 +96,21 @@ static void ast_detect_tx_chip(struct ast_device *ast, bool need_post)
        /* Check 3rd Tx option (digital output afaik) */
        ast->tx_chip = AST_TX_NONE;
 
-       /*
-        * VGACRA3 Enhanced Color Mode Register, check if DVO is already
-        * enabled, in that case, assume we have a SIL164 TMDS transmitter
-        *
-        * Don't make that assumption if we the chip wasn't enabled and
-        * is at power-on reset, otherwise we'll incorrectly "detect" a
-        * SIL164 when there is none.
-        */
-       if (!need_post) {
-               jreg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xff);
-               if (jreg & 0x80)
-                       ast->tx_chip = AST_TX_SIL164;
-       }
-
-       if (IS_AST_GEN4(ast) || IS_AST_GEN5(ast) || IS_AST_GEN6(ast)) {
+       if (AST_GEN(ast) <= 3) {
+               /*
+                * VGACRA3 Enhanced Color Mode Register, check if DVO is already
+                * enabled, in that case, assume we have a SIL164 TMDS transmitter
+                *
+                * Don't make that assumption if we the chip wasn't enabled and
+                * is at power-on reset, otherwise we'll incorrectly "detect" a
+                * SIL164 when there is none.
+                */
+               if (!need_post) {
+                       jreg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xff);
+                       if (jreg & 0x80)
+                               ast->tx_chip = AST_TX_SIL164;
+               }
+       } else if (IS_AST_GEN4(ast) || IS_AST_GEN5(ast) || IS_AST_GEN6(ast)) {
                /*
                 * On AST GEN4+, look the configuration set by the SoC in
                 * the SOC scratch register #1 bits 11:8 (interestingly marked