The clock controller is a part of NXP LPC32xx system control block (SCB),
and SCB provides a number of controllers apart of the clock controller.
[vzapolskiy]:
1. kept a simple comment,
2. renamed SoC specific compatible to 'nxp,lpc3220-scb' due to the SoC UM,
3. changed size in 'ranges', since it should cover more SCB functions,
4. updated the commit message.
Link to the original change:
* https://lore.kernel.org/linux-arm-kernel/
20240627150046.258795-5-piotr.wojtaszczyk@timesys.com/
Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
ranges = <0x20000000 0x20000000 0x30000000>;
/* System Control Block */
- scb {
- compatible = "simple-bus";
- ranges = <0x0 0x40004000 0x00001000>;
+ syscon@40004000 {
+ compatible = "nxp,lpc3220-scb", "syscon", "simple-mfd";
+ reg = <0x40004000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
+ ranges = <0 0x40004000 0x1000>;
clk: clock-controller@0 {
compatible = "nxp,lpc3220-clk";
reg = <0x00 0x114>;
#clock-cells = <1>;
-
clocks = <&xtal_32k>, <&xtal>;
clock-names = "xtal_32k", "xtal";
};