struct timing_generator *tg;
struct dc_context *ctx = dc->ctx;
+ if (dc->caps.ips_support)
+ return;
+
for (i = 0; i < dc->res_pool->timing_generator_count; i++) {
tg = dc->res_pool->timing_generators[i];
/* disable DSC in OPTC */
if (i < dc->res_pool->timing_generator_count) {
tg = dc->res_pool->timing_generators[i];
- tg->funcs->set_dsc_config(tg, OPTC_DSC_DISABLED, 0, 0);
+ if (tg->funcs->set_dsc_config)
+ tg->funcs->set_dsc_config(tg, OPTC_DSC_DISABLED, 0, 0);
}
/* disable DSC in stream encoder */
if (i < dc->res_pool->stream_enc_count) {
se = dc->res_pool->stream_enc[i];
- se->funcs->dp_set_dsc_config(se, OPTC_DSC_DISABLED, 0, 0);
- se->funcs->dp_set_dsc_pps_info_packet(se, false, NULL, true);
+ if (se->funcs->dp_set_dsc_config)
+ se->funcs->dp_set_dsc_config(se, OPTC_DSC_DISABLED, 0, 0);
+ if (se->funcs->dp_set_dsc_pps_info_packet)
+ se->funcs->dp_set_dsc_pps_info_packet(se, false, NULL, true);
}
/* disable DSC block */
if (dccg->funcs->set_ref_dscclk)