amdgcn: Add builtin for vectorized DFmode fabs operation

2022-09-27  Kwok Cheung Yeung  <kcy@codesourcery.com>

	gcc/
	* config/gcn/gcn-builtins.def (FABSV): New builtin.
	* config/gcn/gcn.cc (gcn_expand_builtin_1): Generate
	builtin for GCN_BUILTIN_FABSV.

diff --git a/gcc/ChangeLog.omp b/gcc/ChangeLog.omp
index 39e094476c9abd7e68afe9fc65a7b9ecef6cc662..9933325bf20a8d77d68d208ab596cb96e894caa6 100644 (file)
--- a/gcc/ChangeLog.omp
+++ b/gcc/ChangeLog.omp
@@ -1,3 +1,9 @@
+2022-09-27  Kwok Cheung Yeung  <kcy@codesourcery.com>
+
+       * config/gcn/gcn-builtins.def (FABSV): New builtin.
+       * config/gcn/gcn.cc (gcn_expand_builtin_1): Generate
+       builtin for GCN_BUILTIN_FABSV.
+
 2022-09-27  Kwok Cheung Yeung  <kcy@codesourcery.com>
 
        * config/gcn/gcn-valu.md (math_unop_insn): New attribute.

diff --git a/gcc/config/gcn/gcn-builtins.def b/gcc/config/gcn/gcn-builtins.def
index 27691909925be65364217ef3aac24d7818e132af..21e3f0131e4fc5b408b36d3e5695b33753465296 100644 (file)
--- a/gcc/config/gcn/gcn-builtins.def
+++ b/gcc/config/gcn/gcn-builtins.def
@@ -64,6 +64,11 @@ DEF_BUILTIN (FABSVF, 3 /*CODE_FOR_fabsvf */,
             _A2 (GCN_BTI_V64SF, GCN_BTI_V64SF),
             gcn_expand_builtin_1)
 
+DEF_BUILTIN (FABSV, 3 /*CODE_FOR_fabsv */,
+            "fabsv", B_INSN,
+            _A2 (GCN_BTI_V64DF, GCN_BTI_V64DF),
+            gcn_expand_builtin_1)
+
 DEF_BUILTIN (LDEXPVF, 3 /*CODE_FOR_ldexpvf */,
             "ldexpvf", B_INSN,
             _A3 (GCN_BTI_V64SF, GCN_BTI_V64SF, GCN_BTI_V64SI),

diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc
index ac8784a9a3ddf1f4c29c568a6f185d1f9d337f85..a3f21abc391fb3ab19cfe97826304839067d64eb 100644 (file)
--- a/gcc/config/gcn/gcn.cc
+++ b/gcc/config/gcn/gcn.cc
@@ -4032,6 +4032,19 @@ gcn_expand_builtin_1 (tree exp, rtx target, rtx /*subtarget */ ,
                   (target, arg, gcn_gen_undef (V64SFmode), exec));
        return target;
       }
+    case GCN_BUILTIN_FABSV:
+      {
+       if (ignore)
+         return target;
+       rtx exec = gcn_full_exec_reg ();
+       rtx arg = force_reg (V64DFmode,
+                            expand_expr (CALL_EXPR_ARG (exp, 0), NULL_RTX,
+                                         V64DFmode,
+                                         EXPAND_NORMAL));
+       emit_insn (gen_absv64df2_exec
+                  (target, arg, gcn_gen_undef (V64DFmode), exec));
+       return target;
+      }
     case GCN_BUILTIN_LDEXPVF:
       {
        if (ignore)