perf arm_spe: Synthesize memory samples for SIMD operations

Synthesize memory samples for SIMD operations (including Advanced SIMD,
SVE, and SME). To provide complete information, also generate data
source entries for SIMD operations.

Since memory operations are not limited to load and store, set
PERF_MEM_OP_STORE if the operation does not fall into these cases.

Signed-off-by: Leo Yan <leo.yan@arm.com>
Reviewed-by: Ian Rogers <irogers@google.com>
Reviewed-by: James Clark <james.clark@linaro.org>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>

diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c
index 881257d3958705e725f1b7d47b41a93defd231ea..6a9c61d4aeeb2283a426d0a00ff7072eb5049c31 100644 (file)
--- a/tools/perf/util/arm-spe.c
+++ b/tools/perf/util/arm-spe.c
@@ -39,6 +39,11 @@
 
 #define is_ldst_op(op)         (!!((op) & ARM_SPE_OP_LDST))
 
+#define is_simd_op(op)         (!!((op) & (ARM_SPE_OP_SIMD_FP | ARM_SPE_OP_SVE | \
+                                           ARM_SPE_OP_SME | ARM_SPE_OP_ASE)))
+
+#define is_mem_op(op)          (is_ldst_op(op) || is_simd_op(op))
+
 #define ARM_SPE_CACHE_EVENT(lvl) \
        (ARM_SPE_##lvl##_ACCESS | ARM_SPE_##lvl##_MISS)
 
@@ -986,8 +991,7 @@ arm_spe__synth_data_source(struct arm_spe_queue *speq,
 {
        union perf_mem_data_src data_src = {};
 
-       /* Only synthesize data source for LDST operations */
-       if (!is_ldst_op(record->op))
+       if (!is_mem_op(record->op))
                return data_src;
 
        if (record->op & ARM_SPE_OP_LD)
@@ -995,7 +999,7 @@ arm_spe__synth_data_source(struct arm_spe_queue *speq,
        else if (record->op & ARM_SPE_OP_ST)
                data_src.mem_op = PERF_MEM_OP_STORE;
        else
-               return data_src;
+               data_src.mem_op = PERF_MEM_OP_NA;
 
        arm_spe__synth_ds(speq, record, &data_src);
        arm_spe__synth_memory_level(speq, record, &data_src);
@@ -1096,11 +1100,7 @@ static int arm_spe_sample(struct arm_spe_queue *speq)
                        return err;
        }
 
-       /*
-        * When data_src is zero it means the record is not a memory operation,
-        * skip to synthesize memory sample for this case.
-        */
-       if (spe->sample_memory && is_ldst_op(record->op)) {
+       if (spe->sample_memory && is_mem_op(record->op)) {
                err = arm_spe__synth_mem_sample(speq, spe->memory_id, data_src);
                if (err)
                        return err;