kaiser: asm/tlbflush.h handle noPGE at lower level

I found asm/tlbflush.h too twisty, and think it safer not to avoid
__native_flush_tlb_global_irq_disabled() in the kaiser_enabled case,
but instead let it handle kaiser_enabled along with cr3: it can just
use __native_flush_tlb() for that, no harm in re-disabling preemption.

(This is not the same change as Kirill and Dave have suggested for
upstream, flipping PGE in cr4: that's neat, but needs a cpu_has_pge
check; cr3 is enough for kaiser, and thought to be cheaper than cr4.)

Also delete the X86_FEATURE_INVPCID invpcid_flush_all_nonglobals()
preference from __native_flush_tlb(): unlike the invpcid_flush_all()
preference in __native_flush_tlb_global(), it's not seen in upstream
4.14, and was recently reported to be surprisingly slow.

(cherry picked from Change-Id: I0da819a797ff46bca6590040b6480178dff6ba1e)

Signed-off-by: Hugh Dickins <hughd@google.com>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>

diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index 616eca18ed3185765eac3ca5d17637d5a85f1124..63a101f3379ce7fa797fab6dbfda3caac83dccfe 100644 (file)
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -84,14 +84,6 @@ static inline void kaiser_flush_tlb_on_return_to_user(void)
 
 static inline void __native_flush_tlb(void)
 {
-       if (this_cpu_has(X86_FEATURE_INVPCID)) {
-               /*
-                * Note, this works with CR4.PCIDE=0 or 1.
-                */
-               invpcid_flush_all_nonglobals();
-               return;
-       }
-
        /*
         * If current->mm == NULL then we borrow a mm which may change during a
         * task switch and therefore we must not be preempted while we write CR3
@@ -109,12 +101,6 @@ static inline void __native_flush_tlb_global(void)
        unsigned long flags;
        unsigned long cr4;
 
-       if (kaiser_enabled) {
-               /* Globals are not used at all */
-               __native_flush_tlb();
-               return;
-       }
-
        if (this_cpu_has(X86_FEATURE_INVPCID)) {
                /*
                 * Using INVPCID is considerably faster than a pair of writes
@@ -140,7 +126,8 @@ static inline void __native_flush_tlb_global(void)
                /* restore PGE as it was before */
                native_write_cr4(cr4);
        } else {
-               native_write_cr3(native_read_cr3());
+               /* do it with cr3, letting kaiser flush user PCID */
+               __native_flush_tlb();
        }
 
        raw_local_irq_restore(flags);
@@ -180,11 +167,7 @@ static inline void __native_flush_tlb_single(unsigned long addr)
 
 static inline void __flush_tlb_all(void)
 {
-       if (cpu_has_pge)
-               __flush_tlb_global();
-       else
-               __flush_tlb();
-
+       __flush_tlb_global();
        /*
         * Note: if we somehow had PCID but not PGE, then this wouldn't work --
         * we'd end up flushing kernel translations for the current ASID but