&cam_bist_mclk_cc_pll0,
};
-static u32 cam_bist_mclk_cc_kaanapali_critical_cbcrs[] = {
+static const u32 cam_bist_mclk_cc_kaanapali_critical_cbcrs[] = {
0x40e0, /* CAM_BIST_MCLK_CC_SLEEP_CLK */
};
&cam_bist_mclk_cc_pll0,
};
-static u32 cam_bist_mclk_cc_sm8750_critical_cbcrs[] = {
+static const u32 cam_bist_mclk_cc_sm8750_critical_cbcrs[] = {
0x40f8, /* CAM_BIST_MCLK_CC_SLEEP_CLK */
};
&cam_cc_pll7,
};
-static u32 cam_cc_kaanapali_critical_cbcrs[] = {
+static const u32 cam_cc_kaanapali_critical_cbcrs[] = {
0x21398, /* CAM_CC_DRV_AHB_CLK */
0x21390, /* CAM_CC_DRV_XO_CLK */
0x21364, /* CAM_CC_GDSC_CLK */
&cam_cc_pll6,
};
-static u32 cam_cc_milos_critical_cbcrs[] = {
+static const u32 cam_cc_milos_critical_cbcrs[] = {
0x25038, /* CAM_CC_GDSC_CLK */
0x2505c, /* CAM_CC_SLEEP_CLK */
};
&cam_cc_pll6,
};
-static u32 cam_cc_sc8180x_critical_cbcrs[] = {
+static const u32 cam_cc_sc8180x_critical_cbcrs[] = {
0xc1e4, /* CAM_CC_GDSC_CLK */
0xc200, /* CAM_CC_SLEEP_CLK */
};
&cam_cc_pll8,
};
-static u32 cam_cc_sm8450_critical_cbcrs[] = {
+static const u32 cam_cc_sm8450_critical_cbcrs[] = {
0x1320c, /* CAM_CC_GDSC_CLK */
};
&cam_cc_pll12,
};
-static u32 cam_cc_sm8550_critical_cbcrs[] = {
+static const u32 cam_cc_sm8550_critical_cbcrs[] = {
0x1419c, /* CAM_CC_GDSC_CLK */
0x142cc, /* CAM_CC_SLEEP_CLK */
};
&cam_cc_pll10,
};
-static u32 cam_cc_sm8650_critical_cbcrs[] = {
+static const u32 cam_cc_sm8650_critical_cbcrs[] = {
0x132ec, /* CAM_CC_GDSC_CLK */
0x13308, /* CAM_CC_SLEEP_CLK */
0x13314, /* CAM_CC_DRV_XO_CLK */
&cam_cc_pll6,
};
-static u32 cam_cc_sm8750_critical_cbcrs[] = {
+static const u32 cam_cc_sm8750_critical_cbcrs[] = {
0x113c4, /* CAM_CC_DRV_AHB_CLK */
0x113c0, /* CAM_CC_DRV_XO_CLK */
0x1137c, /* CAM_CC_GDSC_CLK */
&cam_cc_pll8,
};
-static u32 cam_cc_x1e80100_critical_cbcrs[] = {
+static const u32 cam_cc_x1e80100_critical_cbcrs[] = {
0x13a9c, /* CAM_CC_GDSC_CLK */
0x13ab8, /* CAM_CC_SLEEP_CLK */
};
struct qcom_cc_driver_data {
struct clk_alpha_pll **alpha_plls;
size_t num_alpha_plls;
- u32 *clk_cbcrs;
+ const u32 *clk_cbcrs;
size_t num_clk_cbcrs;
const struct clk_rcg_dfs_data *dfs_rcgs;
size_t num_dfs_rcgs;
&disp_cc_pll2,
};
-static u32 disp_cc_eliza_critical_cbcrs[] = {
+static const u32 disp_cc_eliza_critical_cbcrs[] = {
0xe07c, /* DISP_CC_SLEEP_CLK */
0xe05c, /* DISP_CC_XO_CLK */
0xc00c, /* DISP_CC_MDSS_RSCC_AHB_CLK */
&disp_cc_pll1,
};
-static u32 disp_cc_glymur_critical_cbcrs[] = {
+static const u32 disp_cc_glymur_critical_cbcrs[] = {
0xe07c, /* DISP_CC_SLEEP_CLK */
0xe05c, /* DISP_CC_XO_CLK */
};
&disp_cc_pll2,
};
-static u32 disp_cc_kaanapali_critical_cbcrs[] = {
+static const u32 disp_cc_kaanapali_critical_cbcrs[] = {
0xe064, /* DISP_CC_SLEEP_CLK */
0xe05c, /* DISP_CC_XO_CLK */
0xc00c, /* DISP_CC_MDSS_RSCC_AHB_CLK */
&disp_cc_pll0,
};
-static u32 disp_cc_milos_critical_cbcrs[] = {
+static const u32 disp_cc_milos_critical_cbcrs[] = {
0xe06c, /* DISP_CC_SLEEP_CLK */
0xe04c, /* DISP_CC_XO_CLK */
};
&disp_cc_pll0,
};
-static u32 disp_cc_qcs615_critical_cbcrs[] = {
+static const u32 disp_cc_qcs615_critical_cbcrs[] = {
0x6054, /* DISP_CC_XO_CLK */
};
[GCC_VIDEO_BCR] = { 0x32000 },
};
-static u32 gcc_eliza_critical_cbcrs[] = {
+static const u32 gcc_eliza_critical_cbcrs[] = {
0xa0004, /* GCC_CAM_BIST_MCLK_AHB_CLK */
0x26004, /* GCC_CAMERA_AHB_CLK */
0x26034, /* GCC_CAMERA_XO_CLK */
DEFINE_RCG_DFS(gcc_qupv3_wrap2_s7_clk_src),
};
-static u32 gcc_glymur_critical_cbcrs[] = {
+static const u32 gcc_glymur_critical_cbcrs[] = {
0x26004, /* GCC_CAMERA_AHB_CLK */
0x26040, /* GCC_CAMERA_XO_CLK */
0x27004, /* GCC_DISP_AHB_CLK */
DEFINE_RCG_DFS(gcc_qupv3_wrap4_s4_clk_src),
};
-static u32 gcc_kaanapali_critical_cbcrs[] = {
+static const u32 gcc_kaanapali_critical_cbcrs[] = {
0xa0004, /* GCC_CAM_BIST_MCLK_AHB_CLK */
0x26004, /* GCC_CAMERA_AHB_CLK */
0x2603c, /* GCC_CAMERA_XO_CLK */
[USB3_PHY_GDSC] = &usb3_phy_gdsc,
};
-static u32 gcc_milos_critical_cbcrs[] = {
+static const u32 gcc_milos_critical_cbcrs[] = {
0x26004, /* GCC_CAMERA_AHB_CLK */
0x26018, /* GCC_CAMERA_HF_XO_CLK */
0x2601c, /* GCC_CAMERA_SF_XO_CLK */
[HLOS1_VOTE_TURING_MMU_TBU1_GDSC] = &hlos1_vote_turing_mmu_tbu1_gdsc,
};
-static u32 gcc_sc8180x_critical_cbcrs[] = {
+static const u32 gcc_sc8180x_critical_cbcrs[] = {
0xb004, /* GCC_VIDEO_AHB_CLK */
0xb008, /* GCC_CAMERA_AHB_CLK */
0xb00c, /* GCC_DISP_AHB_CLK */
&gpu_cc_pll0,
};
-static u32 gpu_cc_glymur_critical_cbcrs[] = {
+static const u32 gpu_cc_glymur_critical_cbcrs[] = {
0x93a4, /* GPU_CC_CB_CLK */
0x9008, /* GPU_CC_CXO_AON_CLK */
0x9004, /* GPU_CC_RSCC_XO_AON_CLK */
&gpu_cc_pll0,
};
-static u32 gpu_cc_kaanapali_critical_cbcrs[] = {
+static const u32 gpu_cc_kaanapali_critical_cbcrs[] = {
0x9008, /* GPU_CC_CXO_AON_CLK */
0x93e8, /* GPU_CC_RSCC_HUB_AON_CLK */
0x9004, /* GPU_CC_RSCC_XO_AON_CLK */
&gpu_cc_pll0,
};
-static u32 gpu_cc_milos_critical_cbcrs[] = {
+static const u32 gpu_cc_milos_critical_cbcrs[] = {
0x93a4, /* GPU_CC_CB_CLK */
0x9008, /* GPU_CC_CXO_AON_CLK */
0x9010, /* GPU_CC_DEMET_CLK */
&gpu_cc_pll1,
};
-static u32 gpu_cc_qcs615_critical_cbcrs[] = {
+static const u32 gpu_cc_qcs615_critical_cbcrs[] = {
0x1078, /* GPU_CC_AHB_CLK */
};
&video_cc_pll0,
};
-static u32 video_cc_glymur_critical_cbcrs[] = {
+static const u32 video_cc_glymur_critical_cbcrs[] = {
0x80e0, /* VIDEO_CC_AHB_CLK */
0x8138, /* VIDEO_CC_SLEEP_CLK */
0x8110, /* VIDEO_CC_XO_CLK */
&video_cc_pll3,
};
-static u32 video_cc_kaanapali_critical_cbcrs[] = {
+static const u32 video_cc_kaanapali_critical_cbcrs[] = {
0x817c, /* VIDEO_CC_AHB_CLK */
0x81bc, /* VIDEO_CC_SLEEP_CLK */
0x81b0, /* VIDEO_CC_TS_XO_CLK */
&video_cc_pll0,
};
-static u32 video_cc_milos_critical_cbcrs[] = {
+static const u32 video_cc_milos_critical_cbcrs[] = {
0x80f4, /* VIDEO_CC_AHB_CLK */
0x8140, /* VIDEO_CC_SLEEP_CLK */
0x8124, /* VIDEO_CC_XO_CLK */
&video_pll0,
};
-static u32 video_cc_qcs615_critical_cbcrs[] = {
+static const u32 video_cc_qcs615_critical_cbcrs[] = {
0xab8, /* VIDEO_CC_XO_CLK */
};
&video_cc_pll1,
};
-static u32 video_cc_sm8450_critical_cbcrs[] = {
+static const u32 video_cc_sm8450_critical_cbcrs[] = {
0x80e4, /* VIDEO_CC_AHB_CLK */
0x8114, /* VIDEO_CC_XO_CLK */
0x8130, /* VIDEO_CC_SLEEP_CLK */
&video_cc_pll1,
};
-static u32 video_cc_sm8550_critical_cbcrs[] = {
+static const u32 video_cc_sm8550_critical_cbcrs[] = {
0x80f4, /* VIDEO_CC_AHB_CLK */
0x8124, /* VIDEO_CC_XO_CLK */
0x8140, /* VIDEO_CC_SLEEP_CLK */
};
-static u32 video_cc_sm8650_critical_cbcrs[] = {
+static const u32 video_cc_sm8650_critical_cbcrs[] = {
0x80f4, /* VIDEO_CC_AHB_CLK */
0x8124, /* VIDEO_CC_XO_CLK */
0x8150, /* VIDEO_CC_SLEEP_CLK */
&video_cc_pll0,
};
-static u32 video_cc_sm8750_critical_cbcrs[] = {
+static const u32 video_cc_sm8750_critical_cbcrs[] = {
0x80a4, /* VIDEO_CC_AHB_CLK */
0x80f8, /* VIDEO_CC_SLEEP_CLK */
0x80d4, /* VIDEO_CC_XO_CLK */