drm/amdgpu/gfx9: drop reset_kgq

It doesn't work reliably and we have soft recover and
full adapter reset so drop this.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index d377a7c57d5e13c23edcd0aaef0959760da94339..d50e125fd3e0dc04468eeba6d0900eb87f0dc145 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -7152,51 +7152,6 @@ static void gfx_v9_ring_insert_nop(struct amdgpu_ring *ring, uint32_t num_nop)
        amdgpu_ring_insert_nop(ring, num_nop - 1);
 }
 
-static int gfx_v9_0_reset_kgq(struct amdgpu_ring *ring, unsigned int vmid)
-{
-       struct amdgpu_device *adev = ring->adev;
-       struct amdgpu_kiq *kiq = &adev->gfx.kiq[0];
-       struct amdgpu_ring *kiq_ring = &kiq->ring;
-       unsigned long flags;
-       u32 tmp;
-       int r;
-
-       if (amdgpu_sriov_vf(adev))
-               return -EINVAL;
-
-       if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues)
-               return -EINVAL;
-
-       spin_lock_irqsave(&kiq->ring_lock, flags);
-
-       if (amdgpu_ring_alloc(kiq_ring, 5)) {
-               spin_unlock_irqrestore(&kiq->ring_lock, flags);
-               return -ENOMEM;
-       }
-
-       tmp = REG_SET_FIELD(0, CP_VMID_RESET, RESET_REQUEST, 1 << vmid);
-       gfx_v9_0_ring_emit_wreg(kiq_ring,
-                                SOC15_REG_OFFSET(GC, 0, mmCP_VMID_RESET), tmp);
-       amdgpu_ring_commit(kiq_ring);
-
-       spin_unlock_irqrestore(&kiq->ring_lock, flags);
-
-       r = amdgpu_ring_test_ring(kiq_ring);
-       if (r)
-               return r;
-
-       if (amdgpu_ring_alloc(ring, 7 + 7 + 5))
-               return -ENOMEM;
-       gfx_v9_0_ring_emit_fence(ring, ring->fence_drv.gpu_addr,
-                                ring->fence_drv.sync_seq, AMDGPU_FENCE_FLAG_EXEC);
-       gfx_v9_0_ring_emit_reg_wait(ring,
-                                   SOC15_REG_OFFSET(GC, 0, mmCP_VMID_RESET), 0, 0xffff);
-       gfx_v9_0_ring_emit_wreg(ring,
-                               SOC15_REG_OFFSET(GC, 0, mmCP_VMID_RESET), 0);
-
-       return amdgpu_ring_test_ring(ring);
-}
-
 static int gfx_v9_0_reset_kcq(struct amdgpu_ring *ring,
                              unsigned int vmid)
 {
@@ -7477,7 +7432,6 @@ static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_gfx = {
        .emit_reg_write_reg_wait = gfx_v9_0_ring_emit_reg_write_reg_wait,
        .soft_recovery = gfx_v9_0_ring_soft_recovery,
        .emit_mem_sync = gfx_v9_0_emit_mem_sync,
-       .reset = gfx_v9_0_reset_kgq,
        .emit_cleaner_shader = gfx_v9_0_ring_emit_cleaner_shader,
        .begin_use = amdgpu_gfx_enforce_isolation_ring_begin_use,
        .end_use = amdgpu_gfx_enforce_isolation_ring_end_use,