soc: mediatek: mtk-mmsys: Fix MT8188 VDO1 DPI1 output selection

The VDO1_MERGE4 hardware (merge5 software component) should be
set to enable output to DPI1_SEL by setting BIT(2) but, despite
the intention being exactly that, this won't work because the
declared register mask is wrong as it is set as GENMASK(1, 0).

Register MERGE4_MOUT_EN in VDO1 has four used bits [3, 0] so
fix the mask to reflect that.
That, in turn, allows the mmsys driver to actually set BIT(2)
in this register, fixing the MERGE4 output to DPI1 selection.

Fixes: c0349314d5a0 ("soc: mediatek: Support MT8188 VDOSYS1 in mtk-mmsys")
Link: https://lore.kernel.org/r/20250212100012.33001-3-angelogioacchino.delregno@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

diff --git a/drivers/soc/mediatek/mt8188-mmsys.h b/drivers/soc/mediatek/mt8188-mmsys.h
index 6bebf1a69fc0763e9c4835c98114fe3fb3058b82..a1d63be0a73dc60bd9e2ef9125bac48f6b081cba 100644 (file)
--- a/drivers/soc/mediatek/mt8188-mmsys.h
+++ b/drivers/soc/mediatek/mt8188-mmsys.h
@@ -343,7 +343,7 @@ static const struct mtk_mmsys_routes mmsys_mt8188_vdo1_routing_table[] = {
                MT8188_DISP_DPI1_SEL_IN_FROM_VPP_MERGE4_MOUT
        }, {
                DDP_COMPONENT_MERGE5, DDP_COMPONENT_DPI1,
-               MT8188_VDO1_MERGE4_SOUT_SEL, GENMASK(1, 0),
+               MT8188_VDO1_MERGE4_SOUT_SEL, GENMASK(3, 0),
                MT8188_MERGE4_SOUT_TO_DPI1_SEL
        }, {
                DDP_COMPONENT_MERGE5, DDP_COMPONENT_DP_INTF1,