Use release memory ordering when incrementing reference counter

As the relaxed memory ordering doesn't ensure any memory
synchronization, it is possible that the increment will succeed even
in the case when it should not - there is a race between
atomic_fetch_sub(..., acq_rel) and atomic_fetch_add(..., relaxed).
Only the result is consistent, but the previous value for both calls
could be same when both calls are executed at the same time.

diff --git a/lib/isc/include/isc/refcount.h b/lib/isc/include/isc/refcount.h
index 090dc7ec2a7c0c4e382e12cad59af6c7ba8b7014..82f5796bd601d8f3ae3d541a8dd1b19e58710053 100644 (file)
--- a/lib/isc/include/isc/refcount.h
+++ b/lib/isc/include/isc/refcount.h
@@ -70,7 +70,7 @@ typedef atomic_uint_fast32_t isc_refcount_t;
 #define isc_refcount_increment0(target)                    \
        ({                                                 \
                uint_fast32_t __v;                         \
-               __v = atomic_fetch_add_relaxed(target, 1); \
+               __v = atomic_fetch_add_release(target, 1); \
                INSIST(__v < UINT32_MAX);                  \
                __v;                                       \
        })
@@ -83,7 +83,7 @@ typedef atomic_uint_fast32_t isc_refcount_t;
 #define isc_refcount_increment(target)                     \
        ({                                                 \
                uint_fast32_t __v;                         \
-               __v = atomic_fetch_add_relaxed(target, 1); \
+               __v = atomic_fetch_add_release(target, 1); \
                INSIST(__v > 0 && __v < UINT32_MAX);       \
                __v;                                       \
        })