drm/amd/pm: Treat zero vblank time as too short in si_dpm (v3)

[ Upstream commit 9003a0746864f39a0ef72bd45f8e1ad85d930d67 ]

Some parts of the code base expect that MCLK switching is turned
off when the vblank time is set to zero.

According to pp_pm_compute_clocks the non-DC code has issues
with MCLK switching with refresh rates over 120 Hz.

v3:
Add code comment to explain this better.
Add an if statement instead of changing the switch_limit.

Fixes: 841686df9f7d ("drm/amdgpu: add SI DPM support (v4)")
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
index 267aa96edc8908f4c33b73b83e1224448921163d..b3c011542daf706c7ed52eba96cb5cda71e07f5d 100644 (file)
--- a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
+++ b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
@@ -3066,7 +3066,13 @@ static bool si_dpm_vblank_too_short(void *handle)
        /* we never hit the non-gddr5 limit so disable it */
        u32 switch_limit = adev->gmc.vram_type == AMDGPU_VRAM_TYPE_GDDR5 ? 450 : 0;
 
-       if (vblank_time < switch_limit)
+       /* Consider zero vblank time too short and disable MCLK switching.
+        * Note that the vblank time is set to maximum when no displays are attached,
+        * so we'll still enable MCLK switching in that case.
+        */
+       if (vblank_time == 0)
+               return true;
+       else if (vblank_time < switch_limit)
                return true;
        else
                return false;