]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: qcom: lemans: move USB PHYs to a proper place
authorDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Sun, 21 Sep 2025 07:09:18 +0000 (10:09 +0300)
committerBjorn Andersson <andersson@kernel.org>
Mon, 27 Oct 2025 15:09:57 +0000 (10:09 -0500)
Sort the lemans.dtsi, moving USB1 and USB2 PHYs to a proper place,
making the DT file sorted by the address.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250921-refgen-v1-2-9d93e64133ea@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/lemans.dtsi

index c2d2200d845b3843af096d138a826c7f2acb782d..5fb083a19918c927acc0a5ac763321f02218fdbe 100644 (file)
                        status = "disabled";
                };
 
+               usb_1_hsphy: phy@88e6000 {
+                       compatible = "qcom,sa8775p-usb-hs-phy",
+                                    "qcom,usb-snps-hs-5nm-phy";
+                       reg = <0 0x088e6000 0 0x120>;
+                       clocks = <&gcc GCC_USB_CLKREF_EN>;
+                       clock-names = "ref";
+                       resets = <&gcc GCC_USB2_PHY_SEC_BCR>;
+
+                       #phy-cells = <0>;
+
+                       status = "disabled";
+               };
+
+               usb_2_hsphy: phy@88e7000 {
+                       compatible = "qcom,sa8775p-usb-hs-phy",
+                                    "qcom,usb-snps-hs-5nm-phy";
+                       reg = <0 0x088e7000 0 0x120>;
+                       clocks = <&gcc GCC_USB_CLKREF_EN>;
+                       clock-names = "ref";
+                       resets = <&gcc GCC_USB3_PHY_TERT_BCR>;
+
+                       #phy-cells = <0>;
+
+                       status = "disabled";
+               };
+
                usb_0_qmpphy: phy@88e8000 {
                        compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
                        reg = <0 0x088e8000 0 0x2000>;
                        status = "disabled";
                };
 
+               usb_1_qmpphy: phy@88ea000 {
+                       compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
+                       reg = <0 0x088ea000 0 0x2000>;
+
+                       clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>,
+                                <&gcc GCC_USB_CLKREF_EN>,
+                                <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>,
+                                <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
+                       clock-names = "aux", "ref", "com_aux", "pipe";
+
+                       resets = <&gcc GCC_USB3_PHY_SEC_BCR>,
+                                <&gcc GCC_USB3PHY_PHY_SEC_BCR>;
+                       reset-names = "phy", "phy_phy";
+
+                       power-domains = <&gcc USB30_SEC_GDSC>;
+
+                       #clock-cells = <0>;
+                       clock-output-names = "usb3_sec_phy_pipe_clk_src";
+
+                       #phy-cells = <0>;
+
+                       status = "disabled";
+               };
+
                usb_0: usb@a600000 {
                        compatible = "qcom,sa8775p-dwc3", "qcom,snps-dwc3";
                        reg = <0 0x0a600000 0 0xfc100>;
                        status = "disabled";
                };
 
-               usb_1_hsphy: phy@88e6000 {
-                       compatible = "qcom,sa8775p-usb-hs-phy",
-                                    "qcom,usb-snps-hs-5nm-phy";
-                       reg = <0 0x088e6000 0 0x120>;
-                       clocks = <&gcc GCC_USB_CLKREF_EN>;
-                       clock-names = "ref";
-                       resets = <&gcc GCC_USB2_PHY_SEC_BCR>;
-
-                       #phy-cells = <0>;
-
-                       status = "disabled";
-               };
-
-               usb_1_qmpphy: phy@88ea000 {
-                       compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
-                       reg = <0 0x088ea000 0 0x2000>;
-
-                       clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>,
-                                <&gcc GCC_USB_CLKREF_EN>,
-                                <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>,
-                                <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
-                       clock-names = "aux", "ref", "com_aux", "pipe";
-
-                       resets = <&gcc GCC_USB3_PHY_SEC_BCR>,
-                                <&gcc GCC_USB3PHY_PHY_SEC_BCR>;
-                       reset-names = "phy", "phy_phy";
-
-                       power-domains = <&gcc USB30_SEC_GDSC>;
-
-                       #clock-cells = <0>;
-                       clock-output-names = "usb3_sec_phy_pipe_clk_src";
-
-                       #phy-cells = <0>;
-
-                       status = "disabled";
-               };
-
                usb_1: usb@a800000 {
                        compatible = "qcom,sa8775p-dwc3", "qcom,snps-dwc3";
                        reg = <0 0x0a800000 0 0xfc100>;
                        status = "disabled";
                };
 
-               usb_2_hsphy: phy@88e7000 {
-                       compatible = "qcom,sa8775p-usb-hs-phy",
-                                    "qcom,usb-snps-hs-5nm-phy";
-                       reg = <0 0x088e7000 0 0x120>;
-                       clocks = <&gcc GCC_USB_CLKREF_EN>;
-                       clock-names = "ref";
-                       resets = <&gcc GCC_USB3_PHY_TERT_BCR>;
-
-                       #phy-cells = <0>;
-
-                       status = "disabled";
-               };
-
                usb_2: usb@a400000 {
                        compatible = "qcom,sa8775p-dwc3", "qcom,snps-dwc3";
                        reg = <0 0x0a400000 0 0xfc100>;