AVX512: Restrict default masks for prefetch gather/scatter

instructions.

gcc/

	PR target/69228
	* config/i386/sse.md (define_expand "avx512pf_gatherpf<mode>sf"):
	Change first operand predicate from register_or_constm1_operand
	to register_operand.
	(define_expand "avx512pf_gatherpf<mode>df"): Likewise.
	(define_expand "avx512pf_scatterpf<mode>sf"): Likewise.
	(define_expand "avx512pf_scatterpf<mode>df"): Likewise.
	(define_insn "*avx512pf_gatherpf<mode>sf"): Remove.
	(define_insn "*avx512pf_gatherpf<mode>df"): Likewise.
	(define_insn "*avx512pf_scatterpf<mode>sf"): Likewise.
	(define_insn "*avx512pf_scatterpf<mode>df"): Likewise.
	* config/i386/i386.c (ix86_expand_builtin): Remove first operand
	comparison with constm1_rtx from vec_prefetch_gen part.

gcc/testsuite

	PR target/69228
	* gcc.target/i386/avx512pf-vscatterpf0dpd-1.c: Adjust.
	* gcc.target/i386/avx512pf-vscatterpf0dps-1.c: Likewise.
	* gcc.target/i386/avx512pf-vscatterpf0qpd-1.c: Likewise.
	* gcc.target/i386/avx512pf-vscatterpf0qps-1.c: Likewise.
	* gcc.target/i386/avx512pf-vscatterpf1dpd-1.c: Likewise.
	* gcc.target/i386/avx512pf-vscatterpf1dps-1.c: Likewise.
	* gcc.target/i386/avx512pf-vscatterpf1qpd-1.c: Likewise.
	* gcc.target/i386/avx512pf-vscatterpf1qps-1.c: Likewise.

From-SVN: r232324

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5be7ebf80d900d30bdb52c27b0db386677b471f8..73365bfab151761ca98060ab2728f90826839085 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,19 @@
+2016-01-13  Alexander Fomin <alexander.fomin@intel.com>
+
+       PR target/69228
+       * config/i386/sse.md (define_expand "avx512pf_gatherpf<mode>sf"):
+       Change first operand predicate from register_or_constm1_operand
+       to register_operand.
+       (define_expand "avx512pf_gatherpf<mode>df"): Likewise.
+       (define_expand "avx512pf_scatterpf<mode>sf"): Likewise.
+       (define_expand "avx512pf_scatterpf<mode>df"): Likewise.
+       (define_insn "*avx512pf_gatherpf<mode>sf"): Remove.
+       (define_insn "*avx512pf_gatherpf<mode>df"): Likewise.
+       (define_insn "*avx512pf_scatterpf<mode>sf"): Likewise.
+       (define_insn "*avx512pf_scatterpf<mode>df"): Likewise.
+       * config/i386/i386.c (ix86_expand_builtin): Remove first operand
+       comparison with constm1_rtx from vec_prefetch_gen part.
+
 2016-01-13  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/69013

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index ed91e5d13fa2ecbb95e7e82ab877c589adbefede..8df73b1b513d277a76ac422882a3a7752d10a99e 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -41828,13 +41828,12 @@ rdseed_step:
 
       op0 = fixup_modeless_constant (op0, mode0);
 
-      if (GET_MODE (op0) == mode0
-         || (GET_MODE (op0) == VOIDmode && op0 != constm1_rtx))
+      if (GET_MODE (op0) == mode0 || GET_MODE (op0) == VOIDmode)
        {
          if (!insn_data[icode].operand[0].predicate (op0, mode0))
            op0 = copy_to_mode_reg (mode0, op0);
        }
-      else if (op0 != constm1_rtx)
+      else
        {
          op0 = copy_to_reg (op0);
          op0 = simplify_gen_subreg (mode0, op0, GET_MODE (op0), 0);

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index c8e2150a14d855fad5e0cc447477e47c345ed573..84d2b7af59b143990bfe1d6b06ab91ebd8878e38 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -15654,7 +15654,7 @@
 
 (define_expand "avx512pf_gatherpf<mode>sf"
   [(unspec
-     [(match_operand:<avx512fmaskmode> 0 "register_or_constm1_operand")
+     [(match_operand:<avx512fmaskmode> 0 "register_operand")
       (mem:<GATHER_SCATTER_SF_MEM_MODE>
        (match_par_dup 5
          [(match_operand 2 "vsib_address_operand")
@@ -15696,37 +15696,10 @@
    (set_attr "prefix" "evex")
    (set_attr "mode" "XI")])
 
-(define_insn "*avx512pf_gatherpf<mode>sf"
-  [(unspec
-     [(const_int -1)
-      (match_operator:<GATHER_SCATTER_SF_MEM_MODE> 4 "vsib_mem_operator"
-       [(unspec:P
-          [(match_operand:P 1 "vsib_address_operand" "Tv")
-           (match_operand:VI48_512 0 "register_operand" "v")
-           (match_operand:SI 2 "const1248_operand" "n")]
-          UNSPEC_VSIBADDR)])
-      (match_operand:SI 3 "const_2_to_3_operand" "n")]
-     UNSPEC_GATHER_PREFETCH)]
-  "TARGET_AVX512PF"
-{
-  switch (INTVAL (operands[3]))
-    {
-    case 3:
-      return "vgatherpf0<ssemodesuffix>ps\t{%4|%4}";
-    case 2:
-      return "vgatherpf1<ssemodesuffix>ps\t{%4|%4}";
-    default:
-      gcc_unreachable ();
-    }
-}
-  [(set_attr "type" "sse")
-   (set_attr "prefix" "evex")
-   (set_attr "mode" "XI")])
-
 ;; Packed double variants
 (define_expand "avx512pf_gatherpf<mode>df"
   [(unspec
-     [(match_operand:<avx512fmaskmode> 0 "register_or_constm1_operand")
+     [(match_operand:<avx512fmaskmode> 0 "register_operand")
       (mem:V8DF
        (match_par_dup 5
          [(match_operand 2 "vsib_address_operand")
@@ -15768,37 +15741,10 @@
    (set_attr "prefix" "evex")
    (set_attr "mode" "XI")])
 
-(define_insn "*avx512pf_gatherpf<mode>df"
-  [(unspec
-     [(const_int -1)
-      (match_operator:V8DF 4 "vsib_mem_operator"
-       [(unspec:P
-          [(match_operand:P 1 "vsib_address_operand" "Tv")
-           (match_operand:VI4_256_8_512 0 "register_operand" "v")
-           (match_operand:SI 2 "const1248_operand" "n")]
-          UNSPEC_VSIBADDR)])
-      (match_operand:SI 3 "const_2_to_3_operand" "n")]
-     UNSPEC_GATHER_PREFETCH)]
-  "TARGET_AVX512PF"
-{
-  switch (INTVAL (operands[3]))
-    {
-    case 3:
-      return "vgatherpf0<ssemodesuffix>pd\t{%4|%4}";
-    case 2:
-      return "vgatherpf1<ssemodesuffix>pd\t{%4|%4}";
-    default:
-      gcc_unreachable ();
-    }
-}
-  [(set_attr "type" "sse")
-   (set_attr "prefix" "evex")
-   (set_attr "mode" "XI")])
-
 ;; Packed float variants
 (define_expand "avx512pf_scatterpf<mode>sf"
   [(unspec
-     [(match_operand:<avx512fmaskmode> 0 "register_or_constm1_operand")
+     [(match_operand:<avx512fmaskmode> 0 "register_operand")
       (mem:<GATHER_SCATTER_SF_MEM_MODE>
        (match_par_dup 5
          [(match_operand 2 "vsib_address_operand")
@@ -15842,39 +15788,10 @@
    (set_attr "prefix" "evex")
    (set_attr "mode" "XI")])
 
-(define_insn "*avx512pf_scatterpf<mode>sf"
-  [(unspec
-     [(const_int -1)
-      (match_operator:<GATHER_SCATTER_SF_MEM_MODE> 4 "vsib_mem_operator"
-       [(unspec:P
-          [(match_operand:P 1 "vsib_address_operand" "Tv")
-           (match_operand:VI48_512 0 "register_operand" "v")
-           (match_operand:SI 2 "const1248_operand" "n")]
-          UNSPEC_VSIBADDR)])
-      (match_operand:SI 3 "const2367_operand" "n")]
-     UNSPEC_SCATTER_PREFETCH)]
-  "TARGET_AVX512PF"
-{
-  switch (INTVAL (operands[3]))
-    {
-    case 3:
-    case 7:
-      return "vscatterpf0<ssemodesuffix>ps\t{%4|%4}";
-    case 2:
-    case 6:
-      return "vscatterpf1<ssemodesuffix>ps\t{%4|%4}";
-    default:
-      gcc_unreachable ();
-    }
-}
-  [(set_attr "type" "sse")
-   (set_attr "prefix" "evex")
-   (set_attr "mode" "XI")])
-
 ;; Packed double variants
 (define_expand "avx512pf_scatterpf<mode>df"
   [(unspec
-     [(match_operand:<avx512fmaskmode> 0 "register_or_constm1_operand")
+     [(match_operand:<avx512fmaskmode> 0 "register_operand")
       (mem:V8DF
        (match_par_dup 5
          [(match_operand 2 "vsib_address_operand")
@@ -15918,35 +15835,6 @@
    (set_attr "prefix" "evex")
    (set_attr "mode" "XI")])
 
-(define_insn "*avx512pf_scatterpf<mode>df"
-  [(unspec
-     [(const_int -1)
-      (match_operator:V8DF 4 "vsib_mem_operator"
-       [(unspec:P
-          [(match_operand:P 1 "vsib_address_operand" "Tv")
-           (match_operand:VI4_256_8_512 0 "register_operand" "v")
-           (match_operand:SI 2 "const1248_operand" "n")]
-          UNSPEC_VSIBADDR)])
-      (match_operand:SI 3 "const2367_operand" "n")]
-     UNSPEC_SCATTER_PREFETCH)]
-  "TARGET_AVX512PF"
-{
-  switch (INTVAL (operands[3]))
-    {
-    case 3:
-    case 7:
-      return "vscatterpf0<ssemodesuffix>pd\t{%4|%4}";
-    case 2:
-    case 6:
-      return "vscatterpf1<ssemodesuffix>pd\t{%4|%4}";
-    default:
-      gcc_unreachable ();
-    }
-}
-  [(set_attr "type" "sse")
-   (set_attr "prefix" "evex")
-   (set_attr "mode" "XI")])
-
 (define_insn "avx512er_exp2<mode><mask_name><round_saeonly_name>"
   [(set (match_operand:VF_512 0 "register_operand" "=v")
        (unspec:VF_512

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 59596d0955c0b7469a338f0d92d6d4a5b219cb46..da984649aa98ae2d6e1b35945bc028a0d665ebbf 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,15 @@
+2016-01-13  Alexander Fomin <alexander.fomin@intel.com>
+
+       PR target/69228
+       * gcc.target/i386/avx512pf-vscatterpf0dpd-1.c: Adjust.
+       * gcc.target/i386/avx512pf-vscatterpf0dps-1.c: Likewise.
+       * gcc.target/i386/avx512pf-vscatterpf0qpd-1.c: Likewise.
+       * gcc.target/i386/avx512pf-vscatterpf0qps-1.c: Likewise.
+       * gcc.target/i386/avx512pf-vscatterpf1dpd-1.c: Likewise.
+       * gcc.target/i386/avx512pf-vscatterpf1dps-1.c: Likewise.
+       * gcc.target/i386/avx512pf-vscatterpf1qpd-1.c: Likewise.
+       * gcc.target/i386/avx512pf-vscatterpf1qps-1.c: Likewise.
+
 2016-01-13  Jakub Jelinek  <jakub@redhat.com>
 
        PR target/69247

diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0dpd-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0dpd-1.c
index ace50de4fe2133501aa0538ae2b3024888b57dd1..5a153ea3d4cdf340512110048e0813a14479f215 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0dpd-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0dpd-1.c
@@ -1,7 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx512pf -O2" } */
-/* { dg-final { scan-assembler-times "vscatterpf0dpd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vscatterpf0dpd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vscatterpf0dpd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */
 #include <immintrin.h>
 
 volatile __m256i idx;

diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0dps-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0dps-1.c
index d648b2ee95c5ed81bf9a86fd8afef764d827c02d..d1173a2b7f37aba9e549b51bc187a6a6402ccbf1 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0dps-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0dps-1.c
@@ -1,7 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx512pf -O2" } */
-/* { dg-final { scan-assembler-times "vscatterpf0dps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vscatterpf0dps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vscatterpf0dps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */
 
 #include <immintrin.h>
 

diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0qpd-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0qpd-1.c
index d32345c5a9b8ed1b5419fba84cafe515507abfad..67529e7be83e814813b17bbdce412f79b7db8812 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0qpd-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0qpd-1.c
@@ -1,7 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx512pf -O2" } */
-/* { dg-final { scan-assembler-times "vscatterpf0qpd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vscatterpf0qpd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vscatterpf0qpd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */
 
 #include <immintrin.h>
 

diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0qps-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0qps-1.c
index 44c908fe4f0fc595c9751260a4114b25f5975dfd..9ff580fea4d9e5941b8729deef7f56089739e229 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0qps-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0qps-1.c
@@ -1,7 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx512pf -O2" } */
-/* { dg-final { scan-assembler-times "vscatterpf0qps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vscatterpf0qps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vscatterpf0qps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */
 
 #include <immintrin.h>
 

diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1dpd-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1dpd-1.c
index ff3833803692e2fa7acb94f8c1b03333ed1299e4..73a029d10a1d499feac7825c209d2c5f1eace8d5 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1dpd-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1dpd-1.c
@@ -1,7 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx512pf -O2" } */
-/* { dg-final { scan-assembler-times "vscatterpf1dpd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vscatterpf1dpd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vscatterpf1dpd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */
 
 #include <immintrin.h>
 

diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1dps-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1dps-1.c
index 8ec3388cd77f13cdaa5d0982a3e2ebdf39c77b8c..439bc85348504de7afed9393211843689771e2eb 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1dps-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1dps-1.c
@@ -1,7 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx512pf -O2" } */
-/* { dg-final { scan-assembler-times "vscatterpf1dps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vscatterpf1dps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vscatterpf1dps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */
 
 #include <immintrin.h>
 

diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1qpd-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1qpd-1.c
index 2c4eb2a5b47c59a1a81ea3e879cca60ca20954f2..3ae16cd2e1971de0b2f350bc2d7ac5737370761a 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1qpd-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1qpd-1.c
@@ -1,7 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx512pf -O2" } */
-/* { dg-final { scan-assembler-times "vscatterpf1qpd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vscatterpf1qpd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vscatterpf1qpd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */
 
 #include <immintrin.h>
 

diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1qps-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1qps-1.c
index 34bcb6549498ca4a935bc992467edb772b02cdce..35cd7d3b5d38bd2c33dccb97bf00d524fd81e52b 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1qps-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1qps-1.c
@@ -1,7 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx512pf -O2" } */
-/* { dg-final { scan-assembler-times "vscatterpf1qps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vscatterpf1qps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vscatterpf1qps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */
 
 #include <immintrin.h>