backport: re PR target/66474 (Document the use of %x in powerpc asm statements)

2015-06-10  Michael Meissner  <meissner@linux.vnet.ibm.com>

	Backport from mainline:
	2015-06-10  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/66474
	* doc/md.texi (Machine Constraints): Document that on the PowerPC
	if you use a constraint that targets a VSX register, you must use
	%x<n> in the template.

From-SVN: r224336

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 885e9c70cfaa213b1856854b52d0979b61908aba..bfad913c3faf79bbb59de7471f902aa3836ba5a4 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2015-06-10  Michael Meissner  <meissner@linux.vnet.ibm.com>
+
+       Backport from mainline:
+       2015-06-10  Michael Meissner  <meissner@linux.vnet.ibm.com>
+
+       PR target/66474
+       * doc/md.texi (Machine Constraints): Document that on the PowerPC
+       if you use a constraint that targets a VSX register, you must use
+       %x<n> in the template.
+
 2015-06-10  Richard Biener  <rguenther@suse.de>
 
        Backport from mainline

diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 02283b3204c683cc96d5294160c62b317b5af509..58b3005f49bd988a8272b4fff129dc66d7c92daa 100644 (file)
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -2072,6 +2072,27 @@ Altivec vector register
 @item wa
 Any VSX register if the -mvsx option was used or NO_REGS.
 
+When using any of the register constraints (@code{wa}, @code{wd},
+@code{wf}, @code{wg}, @code{wh}, @code{wi}, @code{wj}, @code{wk},
+@code{wl}, @code{wm}, @code{ws}, @code{wt}, @code{wu}, @code{wv},
+@code{ww}, or @code{wy}) that take VSX registers, you must use
+@code{%x<n>} in the template so that the correct register is used.
+Otherwise the register number output in the assembly file will be
+incorrect if an Altivec register is an operand of a VSX instruction
+that expects VSX register numbering.
+
+@smallexample
+asm ("xvadddp %x0,%x1,%x2" : "=wa" (v1) : "wa" (v2), "wa" (v3));
+@end smallexample
+
+is correct, but:
+
+@smallexample
+asm ("xvadddp %0,%1,%2" : "=wa" (v1) : "wa" (v2), "wa" (v3));
+@end smallexample
+
+is not correct.
+
 @item wd
 VSX vector register to hold vector double data or NO_REGS.