perf/amd/ibs: Limit ldlat->l3missonly dependency to Zen5

The ldlat dependency on l3missonly is specific to Zen 5; newer generations
are not affected. This quirk is documented as an erratum in the following
Revision Guide.

  Erratum: 1606 IBS (Instruction Based Sampling) OP Load Latency Filtering
           May Capture Unwanted Samples When L3Miss Filtering is Disabled

  Revision Guide for AMD Family 1Ah Models 00h-0Fh Processors,
  Pub. 58251 Rev. 1.30 July 2025
  https://bugzilla.kernel.org/attachment.cgi?id=309193

Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Namhyung Kim <namhyung@kernel.org>
Link: https://patch.msgid.link/20260216042216.1440-3-ravi.bangoria@amd.com

diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
index 705ef43325be3b75e8c82fa3531113435b7d45d5..e0b64cb13bf9519f69285d9c4465beda9e37ae92 100644 (file)
--- a/arch/x86/events/amd/ibs.c
+++ b/arch/x86/events/amd/ibs.c
@@ -356,7 +356,10 @@ static int perf_ibs_init(struct perf_event *event)
                ldlat >>= 7;
 
                config |= (ldlat - 1) << 59;
-               config |= IBS_OP_L3MISSONLY | IBS_OP_LDLAT_EN;
+
+               config |= IBS_OP_LDLAT_EN;
+               if (cpu_feature_enabled(X86_FEATURE_ZEN5))
+                       config |= IBS_OP_L3MISSONLY;
        }
 
        /*