arm64: dts: qcom: qcm2290: Add uart1 and uart5 nodes

Add nodes to support uart1 and uart5.

Signed-off-by: Wojciech Slenska <wojciech.slenska@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251009090858.32911-1-wojciech.slenska@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
index 746c49d6e0fdb132754cd8d60dca2aa812102215..ffb194be7b0110600e092d3cd5cec67e31795d6a 100644 (file)
--- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
@@ -552,6 +552,13 @@
                                bias-disable;
                        };
 
+                       qup_uart1_default: qup-uart1-default-state {
+                               pins = "gpio4", "gpio5", "gpio69", "gpio70";
+                               function = "qup1";
+                               drive-strength = <2>;
+                               bias-disable;
+                       };
+
                        qup_uart3_default: qup-uart3-default-state {
                                pins = "gpio8", "gpio9", "gpio10", "gpio11";
                                function = "qup3";
@@ -566,6 +573,13 @@
                                bias-disable;
                        };
 
+                       qup_uart5_default: qup-uart5-default-state {
+                               pins = "gpio14", "gpio15", "gpio16", "gpio17";
+                               function = "qup5";
+                               drive-strength = <2>;
+                               bias-disable;
+                       };
+
                        cci0_default: cci0-default-state {
                                pins = "gpio22", "gpio23";
                                function = "cci_i2c";
@@ -1197,6 +1211,23 @@
                                status = "disabled";
                        };
 
+                       uart1: serial@4a84000 {
+                               compatible = "qcom,geni-uart";
+                               reg = <0x0 0x04a84000 0x0 0x4000>;
+                               interrupts = <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
+                               clock-names = "se";
+                               pinctrl-0 = <&qup_uart1_default>;
+                               pinctrl-names = "default";
+                               interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+                                                &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+                                               <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
+                                                &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>;
+                               interconnect-names = "qup-core",
+                                                    "qup-config";
+                               status = "disabled";
+                       };
+
                        i2c2: i2c@4a88000 {
                                compatible = "qcom,geni-i2c";
                                reg = <0x0 0x04a88000 0x0 0x4000>;
@@ -1418,6 +1449,23 @@
                                #size-cells = <0>;
                                status = "disabled";
                        };
+
+                       uart5: serial@4a94000 {
+                               compatible = "qcom,geni-uart";
+                               reg = <0x0 0x04a94000 0x0 0x4000>;
+                               interrupts = <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
+                               clock-names = "se";
+                               pinctrl-0 = <&qup_uart5_default>;
+                               pinctrl-names = "default";
+                               interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
+                                                &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
+                                               <&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
+                                                &config_noc SLAVE_QUP_0 RPM_ALWAYS_TAG>;
+                               interconnect-names = "qup-core",
+                                                    "qup-config";
+                               status = "disabled";
+                       };
                };
 
                usb: usb@4ef8800 {