]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: lx2160a: add sda gpio references for i2c bus recovery
authorJosua Mayer <josua@solid-run.com>
Tue, 24 Mar 2026 12:40:59 +0000 (13:40 +0100)
committerFrank Li <Frank.Li@nxp.com>
Fri, 27 Mar 2026 13:53:28 +0000 (09:53 -0400)
LX2160A pinmux is done in groups by various length bitfields within
configuration registers.

In particular i2c sda/scl pins are always configured together. Therefore
bus recovery may control both sda and scl.

When pinmux nodes and bus recovery was enabled originally for LX2160,
only the scl-gpios were added to the i2c controller nodes.

Add references to sda-gpios for each i2c controller.

Fixes: 8a1365c7bbc1 ("arm64: dts: lx2160a: add pinmux and i2c gpio to support bus recovery")
Signed-off-by: Josua Mayer <josua@solid-run.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi

index 28500e887390909e9d02e329c367064b8382a74c..53b9c5f1f1935e49ba7c330b3c7afb8cd9e98703 100644 (file)
                        pinctrl-0 = <&i2c0_pins>;
                        pinctrl-1 = <&gpio0_3_2_pins>;
                        scl-gpios = <&gpio0 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+                       sda-gpios = <&gpio0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
 
                        pinctrl-0 = <&i2c1_pins>;
                        pinctrl-1 = <&gpio0_31_30_pins>;
                        scl-gpios = <&gpio0 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+                       sda-gpios = <&gpio0 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
 
                        pinctrl-0 = <&i2c2_pins>;
                        pinctrl-1 = <&gpio0_29_28_pins>;
                        scl-gpios = <&gpio0 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+                       sda-gpios = <&gpio0 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
 
                        pinctrl-0 = <&i2c3_pins>;
                        pinctrl-1 = <&gpio0_27_26_pins>;
                        scl-gpios = <&gpio0 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+                       sda-gpios = <&gpio0 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
 
                        pinctrl-0 = <&i2c4_pins>;
                        pinctrl-1 = <&gpio0_25_24_pins>;
                        scl-gpios = <&gpio0 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+                       sda-gpios = <&gpio0 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
 
                        pinctrl-0 = <&i2c5_pins>;
                        pinctrl-1 = <&gpio0_23_22_pins>;
                        scl-gpios = <&gpio0 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+                       sda-gpios = <&gpio0 22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
 
                        pinctrl-0 = <&i2c6_i2c7_pins>;
                        pinctrl-1 = <&gpio1_18_15_pins>;
                        scl-gpios = <&gpio1 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+                       sda-gpios = <&gpio1 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };
 
                        pinctrl-0 = <&i2c6_i2c7_pins>;
                        pinctrl-1 = <&gpio1_18_15_pins>;
                        scl-gpios = <&gpio1 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+                       sda-gpios = <&gpio1 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
                        status = "disabled";
                };