]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
aarch64: Lower vcombine to GIMPLE
authorAndrew Carlotti <andrew.carlotti@arm.com>
Thu, 21 Jul 2022 16:07:23 +0000 (17:07 +0100)
committerAndrew Carlotti <andrew.carlotti@arm.com>
Tue, 26 Jul 2022 09:30:47 +0000 (10:30 +0100)
This lowers vcombine intrinsics to a GIMPLE vector constructor, which enables
better optimisation during GIMPLE passes.

gcc/

* config/aarch64/aarch64-builtins.cc
(aarch64_general_gimple_fold_builtin): Add combine.

gcc/testsuite/

* gcc.target/aarch64/advsimd-intrinsics/combine.c:
New test.

gcc/config/aarch64/aarch64-builtins.cc
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/combine.c [new file with mode: 0644]

index 2cacb4df8a618c43c1c7d7993c78c6fcce6ef971..e2a9faa179c78c28b72138234b2fd585728de10b 100644 (file)
@@ -2808,6 +2808,28 @@ aarch64_general_gimple_fold_builtin (unsigned int fcode, gcall *stmt,
        gimple_call_set_lhs (new_stmt, gimple_call_lhs (stmt));
        break;
 
+     BUILTIN_VDC (BINOP, combine, 0, AUTO_FP)
+     BUILTIN_VD_I (BINOPU, combine, 0, NONE)
+     BUILTIN_VDC_P (BINOPP, combine, 0, NONE)
+       {
+         tree first_part, second_part;
+         if (BYTES_BIG_ENDIAN)
+           {
+             second_part = args[0];
+             first_part = args[1];
+           }
+         else
+           {
+             first_part = args[0];
+             second_part = args[1];
+           }
+         tree ret_type = gimple_call_return_type (stmt);
+         tree ctor = build_constructor_va (ret_type, 2, NULL_TREE, first_part,
+                                           NULL_TREE, second_part);
+         new_stmt = gimple_build_assign (gimple_call_lhs (stmt), ctor);
+       }
+       break;
+
      /*lower store and load neon builtins to gimple.  */
      BUILTIN_VALL_F16 (LOAD1, ld1, 0, LOAD)
      BUILTIN_VDQ_I (LOAD1_U, ld1, 0, LOAD)
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/combine.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/combine.c
new file mode 100644 (file)
index 0000000..d08faf7
--- /dev/null
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { aarch64*-*-* } } } */
+/* { dg-final { check-function-bodies "**" "" {-O[^0]} } } */
+/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
+
+#include <arm_neon.h>
+
+/*
+** foo:
+**     umov    w0, v1\.s\[1\]
+**     ret
+*/
+
+int32_t foo (int32x2_t a, int32x2_t b)
+{
+  int32x4_t c = vcombine_s32(a, b);
+  return vgetq_lane_s32(c, 3);
+}
+