case Mfp_ROUNDWD:
ret = "round.w.d";
break;
+ case Mfp_ROUNDLD:
+ ret = "round.l.d";
+ break;
case Mfp_FLOORWS:
ret = "floor.w.s";
break;
}
if (mode64) {
- /* addiu sp, sp, -8
- sd rA, 0(sp)
- daddu rA, rA, rB
- sd/ld r_dst, 0(rA)
- ld rA, 0(sp)
- daddiu sp, sp, 8 */
- p = mkFormI(p, 25, 29, 29, 0xFFF8);
- p = mkFormI(p, 63, 29, rA, 0);
+ /* daddu rA, rA, rB$
+ sd/ld r_dst, 0(rA)$
+ dsubu rA, rA, rB */
p = mkFormR(p, 0, rA, rB, rA, 0, 45);
p = mkFormI(p, opc1, rA, r_dst, 0);
- p = mkFormI(p, 55, 29, rA, 0);
- p = mkFormI(p, 25, 29, 29, 8);
+ p = mkFormR(p, 0, rA, rB, rA, 0, 47);
} else {
- /* addiu sp, sp, -4
- sw rA, 0(sp)
- addu rA, rA, rB
- sw/lw r_dst, 0(rA)
- lw rA, 0(sp)
- addiu sp, sp, 4 */
- p = mkFormI(p, 9, 29, 29, 0xFFFC);
- p = mkFormI(p, 43, 29, rA, 0);
+ /* addu rA, rA, rB
+ sw/lw r_dst, 0(rA)
+ subu rA, rA, rB */
p = mkFormR(p, 0, rA, rB, rA, 0, 33);
p = mkFormI(p, opc1, rA, r_dst, 0);
- p = mkFormI(p, 35, 29, rA, 0);
- p = mkFormI(p, 9, 29, 29, 4);
+ p = mkFormR(p, 0, rA, rB, rA, 0, 35);
}
if (opc1 >= 40) {
/* store */
switch (i->Min.Cmp.cond) {
case MIPScc_EQ:
- /* addiu r_dst, r0, 1
- beq r_srcL, r_srcR, 2
- nop
- addiu r_dst, r0, 0
- */
- p = mkFormI(p, 9, 0, r_dst, 1);
- p = mkFormI(p, 4, r_srcL, r_srcR, 2);
- p = mkFormR(p, 0, 0, 0, 0, 0, 0);
- p = mkFormI(p, 9, 0, r_dst, 0);
+ /* xor r_dst, r_srcL, r_srcR
+ sltiu r_dst, r_dst, 1 */
+ p = mkFormR(p, 0, r_srcL, r_srcR, r_dst, 0, 38);
+ p = mkFormI(p, 11, r_dst, r_dst, 1);
break;
case MIPScc_NE:
- /* addiu r_dst, r0, 1
- bne r_srcL, r_srcR, 2
- nop
- addiu r_dst, r0, 0
- */
- p = mkFormI(p, 9, 0, r_dst, 1);
- p = mkFormI(p, 5, r_srcL, r_srcR, 2);
- p = mkFormR(p, 0, 0, 0, 0, 0, 0);
- p = mkFormI(p, 9, 0, r_dst, 0);
+ /* xor r_dst, r_srcL, r_srcR
+ sltu r_dst, zero, r_dst */
+ p = mkFormR(p, 0, r_srcL, r_srcR, r_dst, 0, 38);
+ p = mkFormR(p, 0, 0, r_dst, r_dst, 0, 43);
break;
case MIPScc_LT:
/* slt r_dst, r_srcL, r_srcR */
p = mkFormR(p, 0, r_srcL, r_srcR, r_dst, 0, 43);
break;
case MIPScc_LE:
- /* addiu r_dst, r0, 1
- beq r_srcL, r_srcR, 2
- nop
- slt r_dst, r_srcL, r_srcR */
- p = mkFormI(p, 9, 0, r_dst, 1);
- p = mkFormI(p, 4, r_srcL, r_srcR, 2);
- p = mkFormR(p, 0, 0, 0, 0, 0, 0);
- p = mkFormR(p, 0, r_srcL, r_srcR, r_dst, 0, 42);
+ /* slt r_dst, r_srcR, r_srcL
+ xori r_dst, r_dst, 1 */
+ p = mkFormR(p, 0, r_srcR, r_srcL, r_dst, 0, 42);
+ p = mkFormI(p, 14, r_dst, r_dst, 1);
break;
case MIPScc_LS:
- /* addiu r_dst, r0, 1
- beq r_srcL, r_srcR, 2
- nop
- sltu r_dst, r_srcL, r_srcR */
- p = mkFormI(p, 9, 0, r_dst, 1);
- p = mkFormI(p, 4, r_srcL, r_srcR, 2);
- p = mkFormR(p, 0, 0, 0, 0, 0, 0);
- p = mkFormR(p, 0, r_srcL, r_srcR, r_dst, 0, 43);
+ /* sltu r_dst, rsrcR, r_srcL
+ xori r_dsr, r_dst, 1 */
+ p = mkFormR(p, 0, r_srcR, r_srcL, r_dst, 0, 43);
+ p = mkFormI(p, 14, r_dst, r_dst, 1);
break;
default:
goto bad;
fr_src = dregNo(i->Min.FpConvert.src);
p = mkFormR(p, 0x11, 0x11, 0, fr_src, fr_dst, 0x0C);
break;
+ case Mfp_ROUNDLD:
+ fr_dst = dregNo(i->Min.FpConvert.dst);
+ fr_src = dregNo(i->Min.FpConvert.src);
+ p = mkFormR(p, 0x11, 0x11, 0, fr_src, fr_dst, 0x08);
+ break;
case Mfp_FLOORWS:
fr_dst = fregNo(i->Min.FpConvert.dst, mode64);
fr_src = fregNo(i->Min.FpConvert.src, mode64);
return r_dst;
}
- if (e->Iex.Binop.op == Iop_8HLto16) {
- HReg tHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
- HReg tLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
- HReg tLo_1 = newVRegI(env);
- HReg tHi_1 = newVRegI(env);
- HReg r_dst = newVRegI(env);
- HReg mask = newVRegI(env);
-
- addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, tHi_1, tHi,
- MIPSRH_Imm(False, 8)));
-
- addInstr(env, MIPSInstr_LI(mask, 0xff));
- addInstr(env, MIPSInstr_Alu(Malu_AND, tLo_1, tLo,
- MIPSRH_Reg(mask)));
- addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, tHi_1,
- MIPSRH_Reg(tLo_1)));
-
- return r_dst;
- }
-
- if (e->Iex.Binop.op == Iop_16HLto32) {
- HReg tHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
- HReg tLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
+ if (e->Iex.Binop.op == Iop_8HLto16
+ || e->Iex.Binop.op == Iop_16HLto32) {
+ HReg tHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
+ HReg tLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
HReg tLo_1 = newVRegI(env);
HReg tHi_1 = newVRegI(env);
HReg r_dst = newVRegI(env);
- HReg mask = newVRegI(env);
+ UInt shift = 0;
+ UInt mask = 0;
+ switch (e->Iex.Binop.op) {
+ case Iop_8HLto16:
+ shift = 8;
+ mask = 0xff;
+ break;
+ case Iop_16HLto32:
+ shift = 16;
+ mask = 0xffff;
+ break;
+ default:
+ break;
+ }
+ /* sll tHi_1, tHi, shift
+ and tLo_1, tLo, mask
+ or r_dst, tHi_1, tLo_1 */
addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, tHi_1, tHi,
- MIPSRH_Imm(False, 16)));
-
- addInstr(env, MIPSInstr_LI(mask, 0xffff));
+ MIPSRH_Imm(False, shift)));
addInstr(env, MIPSInstr_Alu(Malu_AND, tLo_1, tLo,
- MIPSRH_Reg(mask)));
+ MIPSRH_Imm(False, mask)));
addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, tHi_1,
MIPSRH_Reg(tLo_1)));
-
return r_dst;
}
}
case Iop_1Uto32:
+ case Iop_1Uto64:
+ case Iop_8Uto16:
case Iop_8Uto32:
- case Iop_16Uto32: {
+ case Iop_8Uto64:
+ case Iop_16Uto32:
+ case Iop_16Uto64: {
HReg r_dst = newVRegI(env);
HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
- UShort amt;
+ UShort mask = 0;
switch (op_unop) {
+ case Iop_1Uto64:
+ vassert(mode64);
case Iop_1Uto32:
- amt = 31;
+ mask = toUShort(0x1);
break;
+ case Iop_8Uto64:
+ vassert(mode64);
+ case Iop_8Uto16:
case Iop_8Uto32:
- amt = 24;
+ mask = toUShort(0xFF);
break;
+ case Iop_16Uto64:
+ vassert(mode64);
case Iop_16Uto32:
- amt = 16;
+ mask = toUShort(0xFFFF);
break;
default:
vassert(0);
break;
}
-
- addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, r_dst, r_src,
- MIPSRH_Imm(False, amt)));
- addInstr(env, MIPSInstr_Shft(Mshft_SRL, True, r_dst, r_dst,
- MIPSRH_Imm(False, amt)));
- return r_dst;
- }
-
- case Iop_1Uto64:
- case Iop_8Uto16:
- case Iop_8Uto64:
- case Iop_16Uto64: {
- vassert(mode64);
- HReg r_dst = newVRegI(env);
- HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
- UShort mask = toUShort(op_unop == Iop_16Uto64 ? 0xFFFF : 0xFF);
addInstr(env, MIPSInstr_Alu(Malu_AND, r_dst, r_src,
MIPSRH_Imm(False, mask)));
return r_dst;
return r_dst;
}
- case Iop_CmpNEZ8: {
- HReg r_dst = newVRegI(env);
- HReg tmp = newVRegI(env);
- HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
-
- MIPSCondCode cc;
-
- cc = MIPScc_NE;
- addInstr(env, MIPSInstr_Alu(Malu_AND, tmp, r_src,
- MIPSRH_Imm(False, 0xFF)));
- addInstr(env, MIPSInstr_Cmp(False, True, r_dst, tmp,
- hregMIPS_GPR0(mode64), cc));
- return r_dst;
- }
-
+ case Iop_CmpNEZ8:
case Iop_CmpNEZ16: {
HReg r_dst = newVRegI(env);
HReg tmp = newVRegI(env);
HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
+ UShort mask = (op_unop == Iop_CmpNEZ8) ? 0xFF : 0xFFFF;
- MIPSCondCode cc;
-
- cc = MIPScc_NE;
addInstr(env, MIPSInstr_Alu(Malu_AND, tmp, r_src,
- MIPSRH_Imm(False, 0xFFFF)));
+ MIPSRH_Imm(False, mask)));
addInstr(env, MIPSInstr_Cmp(False, True, r_dst, tmp,
- hregMIPS_GPR0(mode64), cc));
+ hregMIPS_GPR0(mode64), MIPScc_NE));
return r_dst;
}
HReg r_dst = newVRegI(env);
HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
- MIPSCondCode cc;
-
- cc = MIPScc_NE;
-
addInstr(env, MIPSInstr_Cmp(False, True, r_dst, r_src,
- hregMIPS_GPR0(mode64), cc));
+ hregMIPS_GPR0(mode64), MIPScc_NE));
return r_dst;
}
goto irreducible;
HReg r_dst = newVRegI(env);
HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
- if (op_unop == Iop_Left64) {
- addInstr(env, MIPSInstr_Alu(Malu_DSUB, r_dst, hregMIPS_GPR0(mode64),
- MIPSRH_Reg(r_src)));
- } else {
- addInstr(env, MIPSInstr_Alu(Malu_SUB, r_dst, hregMIPS_GPR0(mode64),
- MIPSRH_Reg(r_src)));
- }
+ MIPSAluOp op = (op_unop == Iop_Left64) ? Malu_DSUB : Malu_SUB;
+ addInstr(env, MIPSInstr_Alu(op, r_dst,
+ hregMIPS_GPR0(mode64),
+ MIPSRH_Reg(r_src)));
addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, r_dst,
MIPSRH_Reg(r_src)));
return r_dst;
}
- case Iop_Clz32: {
- HReg r_dst = newVRegI(env);
- HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
- addInstr(env, MIPSInstr_Unary(Mun_CLZ, r_dst, r_src));
- return r_dst;
- }
-
- case Iop_Clz64: {
+ case Iop_Clz64:
vassert(mode64);
+ case Iop_Clz32: {
HReg r_dst = newVRegI(env);
HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
- addInstr(env, MIPSInstr_Unary(Mun_DCLZ, r_dst, r_src));
+ MIPSUnaryOp op = (op_unop == Iop_Clz64) ? Mun_DCLZ : Mun_CLZ;
+ addInstr(env, MIPSInstr_Unary(op, r_dst, r_src));
return r_dst;
}
iselInt64Expr(&hi, &lo, env, e->Iex.Unop.arg);
addInstr(env, MIPSInstr_Alu(Malu_OR, r_src, lo, MIPSRH_Reg(hi)));
}
- MIPSCondCode cc;
-
- cc = MIPScc_NE;
-
addInstr(env, MIPSInstr_Cmp(False, !(env->mode64), r_dst, r_src,
- hregMIPS_GPR0(mode64), cc));
+ hregMIPS_GPR0(mode64), MIPScc_NE));
return r_dst;
}
size32 = False;
break;
default:
- vpanic
- ("iselCondCode(mips): CmpXX32 or CmpXX64");
+ vpanic("iselCondCode(mips): CmpXX32 or CmpXX64");
+ break;
}
addInstr(env, MIPSInstr_Cmp(syned, size32, dst, r1, r2, cc));
{
vassert(env->mode64);
iselInt128Expr_wrk(rHi, rLo, env, e);
-# if 0
- vex_printf("\n");
- ppIRExpr(e);
- vex_printf("\n");
-# endif
vassert(hregClass(*rHi) == HRcGPR(env->mode64));
vassert(hregIsVirtual(*rHi));
vassert(hregClass(*rLo) == HRcGPR(env->mode64));
vassert(typeOfIRExpr(env->type_env, e->Iex.ITE.cond) == Ity_I1);
HReg expr0Lo, expr0Hi;
HReg expr1Lo, expr1Hi;
- HReg carryBit;
- HReg tmpHi = newVRegI(env);
- HReg tmpLo = newVRegI(env);
- HReg tmp1Hi = newVRegI(env);
- HReg tmp1Lo = newVRegI(env);
- HReg r_cond_1 = iselWordExpr_R(env, e->Iex.ITE.cond);
- HReg r_cond = newVRegI(env);
- HReg r_cond_neg = newVRegI(env);
- HReg mask = newVRegI(env);
- HReg desLo = newVRegI(env);
- HReg desHi = newVRegI(env);
- carryBit = newVRegI(env);
-
- /* r_cond = 0 - r_cond_1 */
- addInstr(env, MIPSInstr_LI(mask, 0x0));
- addInstr(env, MIPSInstr_Alu(Malu_SUB, r_cond,
- mask, MIPSRH_Reg(r_cond_1)));
+ HReg desLo = newVRegI(env);
+ HReg desHi = newVRegI(env);
+ HReg cond = iselWordExpr_R(env, e->Iex.ITE.cond);
/* expr0Hi:expr0Lo = iffalse */
/* expr1Hi:expr1Lo = iftrue */
iselInt64Expr(&expr0Hi, &expr0Lo, env, e->Iex.ITE.iffalse);
iselInt64Expr(&expr1Hi, &expr1Lo, env, e->Iex.ITE.iftrue);
- addInstr(env, MIPSInstr_Alu(Malu_AND, tmpLo, r_cond,
- MIPSRH_Reg(expr1Lo)));
- addInstr(env, MIPSInstr_Alu(Malu_AND, tmpHi, r_cond,
- MIPSRH_Reg(expr1Hi)));
- addInstr(env, MIPSInstr_Alu(Malu_NOR, r_cond_neg, r_cond,
- MIPSRH_Reg(r_cond)));
- addInstr(env, MIPSInstr_Alu(Malu_AND, tmp1Lo, r_cond_neg,
- MIPSRH_Reg(expr0Lo)));
- addInstr(env, MIPSInstr_Alu(Malu_AND, tmp1Hi, r_cond_neg,
- MIPSRH_Reg(expr0Hi)));
-
- addInstr(env, MIPSInstr_Alu(Malu_ADD, desLo, tmpLo,
- MIPSRH_Reg(tmp1Lo)));
- addInstr(env, MIPSInstr_Cmp(False, True, carryBit, desLo,
- tmpLo, MIPScc_LO));
- addInstr(env, MIPSInstr_Alu(Malu_ADD, tmpHi, tmpHi,
- MIPSRH_Reg(carryBit)));
- addInstr(env, MIPSInstr_Alu(Malu_ADD, desHi, tmpHi,
- MIPSRH_Reg(tmp1Hi)));
+ /* move desLo, expr0Lo
+ * move desHi, expr0Hi
+ * movn desLo, expr1Lo, cond
+ * movn desHi, expr1Hi, cond */
+ addInstr(env, mk_iMOVds_RR(desLo, expr0Lo));
+ addInstr(env, mk_iMOVds_RR(desHi, expr0Hi));
+ addInstr(env, MIPSInstr_MoveCond(MMoveCond_movn, desLo, expr1Lo, cond));
+ addInstr(env, MIPSInstr_MoveCond(MMoveCond_movn, desHi, expr1Hi, cond));
+
*rHi = desHi;
*rLo = desLo;
return;
/* --------- UNARY ops --------- */
if (e->tag == Iex_Unop) {
-
switch (e->Iex.Unop.op) {
case Iop_1Sto64: {
HReg tLo = newVRegI(env);
return r_dst;
}
case Iop_F32toF64: {
- if (mode64) {
- HReg src = iselFltExpr(env, e->Iex.Unop.arg);
- HReg dst = newVRegD(env);
-
- addInstr(env, MIPSInstr_FpConvert(Mfp_CVTDS, dst, src));
- return dst;
- } else {
- MIPSAMode *am_addr;
- HReg src = iselFltExpr(env, e->Iex.Unop.arg);
- HReg dst = newVRegF(env);
-
- sub_from_sp(env, 16); /* Move SP down 16 bytes */
- am_addr = MIPSAMode_IR(0, StackPointer(mode64));
-
- addInstr(env, MIPSInstr_Store(4,
- MIPSAMode_IR(am_addr->Mam.IR.index +4,
- am_addr->Mam.IR.base),
- hregMIPS_GPR0(mode64), mode64));
- addInstr(env, MIPSInstr_FpLdSt(False /* store */, 4, src, am_addr));
-
- /* load as Ity_F64 */
- addInstr(env, MIPSInstr_FpLdSt(True /* load */, 8, dst, am_addr));
- /* Reset SP */
- add_to_sp(env, 16);
+ vassert(mode64);
+ HReg src = iselFltExpr(env, e->Iex.Unop.arg);
+ HReg dst = newVRegD(env);
- return dst;
- }
+ addInstr(env, MIPSInstr_FpConvert(Mfp_CVTDS, dst, src));
+ return dst;
}
case Iop_ReinterpI64asF64: {
- vassert(mode64);
- HReg fr_src = iselWordExpr_R(env, e->Iex.Unop.arg);
- HReg r_dst = newVRegF(env);
+ vassert(mode64);
+ HReg fr_src = iselWordExpr_R(env, e->Iex.Unop.arg);
+ HReg r_dst = newVRegF(env);
- /* Move Doubleword to Floating Point
- dmtc1 r_dst, fr_src */
- addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_dmtc1, r_dst, fr_src));
+ /* Move Doubleword to Floating Point
+ dmtc1 r_dst, fr_src */
+ addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_dmtc1, r_dst, fr_src));
- return r_dst;
- }
+ return r_dst;
+ }
case Iop_I32StoF64: {
vassert(mode64);
HReg dst = newVRegF(env);
- HReg tmp1 = newVRegF(env);
+ HReg tmp = newVRegF(env);
HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
- MIPSAMode *am_addr;
/* Move Word to Floating Point
mtc1 tmp1, r_src */
- addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_mtc1, tmp1, r_src));
-
- HReg irrm = newVRegI(env);
-
- MIPSAMode *am_addr1 = MIPSAMode_IR(552, GuestStatePointer(mode64));
-
- addInstr(env, MIPSInstr_Load(4, irrm, am_addr1, mode64));
-
- /* set rounding mode */
- HReg tmp = newVRegI(env);
- HReg fcsr_old = newVRegI(env);
-
- addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, tmp,
- irrm, MIPSRH_Imm(False, 1)));
- addInstr(env, MIPSInstr_Alu(Malu_XOR, tmp, irrm, MIPSRH_Reg(tmp)));
- addInstr(env, MIPSInstr_Alu(Malu_AND, irrm, tmp,
- MIPSRH_Imm(False, 3)));
- /* save old value of FCSR */
- addInstr(env, MIPSInstr_MfFCSR(fcsr_old));
- /* Move SP down 8 bytes */
- sub_from_sp(env, 8);
- am_addr = MIPSAMode_IR(0, StackPointer(mode64));
-
- /* store old FCSR to stack */
- addInstr(env, MIPSInstr_Store(4, am_addr, fcsr_old, mode64));
-
- /* set new value of FCSR */
- addInstr(env, MIPSInstr_MtFCSR(irrm));
+ addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_mtc1, tmp, r_src));
/* and do convert */
- addInstr(env, MIPSInstr_FpConvert(Mfp_CVTDW, dst, tmp1));
- /* set MIPS roundig mode to default and reset sp */
- set_MIPS_rounding_default(env);
+ addInstr(env, MIPSInstr_FpConvert(Mfp_CVTDW, dst, tmp));
return dst;
}
case Iop_SubF32:
case Iop_SubF64: {
MIPSFpOp op = 0;
- /*INVALID*/ HReg argL = iselFltExpr(env, e->Iex.Triop.details->arg2);
+ HReg argL = iselFltExpr(env, e->Iex.Triop.details->arg2);
HReg argR = iselFltExpr(env, e->Iex.Triop.details->arg3);
HReg dst = newVRegF(env);
switch (e->Iex.Triop.details->op) {
return dst;
}
case Iop_ReinterpI64asF64: {
- HReg Hi;
- HReg Lo;
+ HReg Hi, Lo;
HReg dst = newVRegD(env);
iselInt64Expr(&Hi, &Lo, env, e->Iex.Unop.arg);
case Iop_I32StoF64: {
vassert(!mode64);
HReg dst = newVRegD(env);
- HReg tmp1 = newVRegF(env);
+ HReg tmp = newVRegF(env);
HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
- MIPSAMode *am_addr;
/* Move Word to Floating Point
- mtc1 tmp1, r_src */
- addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_mtc1, tmp1, r_src));
-
- HReg irrm = newVRegI(env);
-
- MIPSAMode *am_addr1 = MIPSAMode_IR(284, GuestStatePointer(mode64));
-
- addInstr(env, MIPSInstr_Load(4, irrm, am_addr1, mode64));
-
- /* set rounding mode */
- HReg tmp = newVRegI(env);
- HReg fcsr_old = newVRegI(env);
-
- addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, tmp, irrm,
- MIPSRH_Imm(False, 1)));
- addInstr(env, MIPSInstr_Alu(Malu_XOR, tmp, irrm, MIPSRH_Reg(tmp)));
- addInstr(env, MIPSInstr_Alu(Malu_AND, irrm, tmp,
- MIPSRH_Imm(False, 3)));
- /* save old value of FCSR */
- addInstr(env, MIPSInstr_MfFCSR(fcsr_old));
- /* Move SP down 8 bytes */
- sub_from_sp(env, 8);
- am_addr = MIPSAMode_IR(0, StackPointer(mode64));
-
- /* store old FCSR to stack */
- addInstr(env, MIPSInstr_Store(4, am_addr, fcsr_old, mode64));
-
- /* set new value of FCSR */
- addInstr(env, MIPSInstr_MtFCSR(irrm));
+ mtc1 tmp, r_src */
+ addInstr(env, MIPSInstr_FpGpMove(MFpGpMove_mtc1, tmp, r_src));
/* and do convert */
- addInstr(env, MIPSInstr_FpConvert(Mfp_CVTDW, dst, tmp1));
-
- /* set MIPS roundinf mode to default and reset sp */
- set_MIPS_rounding_default(env);
+ addInstr(env, MIPSInstr_FpConvert(Mfp_CVTDW, dst, tmp));
return dst;
}
addInstr(env, MIPSInstr_FpConvert(Mfp_TRULD, valD1, valD));
else if (fmt->Mrh.Imm.imm16 == 0x2)
addInstr(env, MIPSInstr_FpConvert(Mfp_CEILLD, valD1, valD));
+ else if (fmt->Mrh.Imm.imm16 == 0x0)
+ addInstr(env, MIPSInstr_FpConvert(Mfp_ROUNDLD, valD1, valD));
else
vassert(0);
return valD1;
case Iop_AddF64:
case Iop_SubF64: {
MIPSFpOp op = 0;
- /*INVALID*/ HReg argL = iselDblExpr(env, e->Iex.Triop.details->arg2);
+ HReg argL = iselDblExpr(env, e->Iex.Triop.details->arg2);
HReg argR = iselDblExpr(env, e->Iex.Triop.details->arg3);
HReg dst = newVRegD(env);
switch (e->Iex.Triop.details->op) {
}
if (ty == Ity_F64) {
- HReg fr_src;
- if (mode64) {
- fr_src = iselFltExpr(env, stmt->Ist.Put.data);
- } else {
- fr_src = iselDblExpr(env, stmt->Ist.Put.data);
- }
+ HReg fr_src = iselFltExpr(env, stmt->Ist.Put.data);
MIPSAMode *am_addr = MIPSAMode_IR(stmt->Ist.Put.offset,
GuestStatePointer(mode64));
addInstr(env, MIPSInstr_FpLdSt(False /*store */ , 8, fr_src,
addInstr(env, MIPSInstr_LoadL(8, r_dst, r_addr, mode64));
return;
}
- /* fallthru */ ;
} else {
/* SC */
MIPSAMode *r_addr;
addInstr(env, MIPSInstr_StoreC(8, r_addr, r_dst, mode64));
return;
}
- /* fallthru */
}
goto stmt_fail;
/* NOTREACHED */}
/* Case: call/return (==boring) transfer to any address */
switch (jk) {
case Ijk_Boring: case Ijk_Ret: case Ijk_Call: {
-
HReg r = iselWordExpr_R(env, next);
- MIPSAMode* amPC = MIPSAMode_IR(offsIP, GuestStatePointer(env->mode64));
+ MIPSAMode* amPC = MIPSAMode_IR(offsIP,
+ GuestStatePointer(env->mode64));
if (env->chainingAllowed) {
addInstr(env, MIPSInstr_XIndir(r, amPC, MIPScc_AL));
} else {
addInstr(env, MIPSInstr_XAssisted(r, amPC, MIPScc_AL,
- Ijk_Boring));
+ Ijk_Boring));
}
return;
}
projects / thirdparty / valgrind.git / commitdiff
