]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
5.15-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 2 Dec 2024 08:59:53 +0000 (09:59 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 2 Dec 2024 08:59:53 +0000 (09:59 +0100)
added patches:
parisc-fix-a-possible-dma-corruption.patch

queue-5.15/parisc-fix-a-possible-dma-corruption.patch [new file with mode: 0644]
queue-5.15/series

diff --git a/queue-5.15/parisc-fix-a-possible-dma-corruption.patch b/queue-5.15/parisc-fix-a-possible-dma-corruption.patch
new file mode 100644 (file)
index 0000000..e64a786
--- /dev/null
@@ -0,0 +1,63 @@
+From 7ae04ba36b381bffe2471eff3a93edced843240f Mon Sep 17 00:00:00 2001
+From: Mikulas Patocka <mpatocka@redhat.com>
+Date: Sat, 27 Jul 2024 20:22:52 +0200
+Subject: parisc: fix a possible DMA corruption
+
+From: Mikulas Patocka <mpatocka@redhat.com>
+
+commit 7ae04ba36b381bffe2471eff3a93edced843240f upstream.
+
+ARCH_DMA_MINALIGN was defined as 16 - this is too small - it may be
+possible that two unrelated 16-byte allocations share a cache line. If
+one of these allocations is written using DMA and the other is written
+using cached write, the value that was written with DMA may be
+corrupted.
+
+This commit changes ARCH_DMA_MINALIGN to be 128 on PA20 and 32 on PA1.1 -
+that's the largest possible cache line size.
+
+As different parisc microarchitectures have different cache line size, we
+define arch_slab_minalign(), cache_line_size() and
+dma_get_cache_alignment() so that the kernel may tune slab cache
+parameters dynamically, based on the detected cache line size.
+
+Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Helge Deller <deller@gmx.de>
+Signed-off-by: Mingli Yu <mingli.yu@windriver.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/parisc/Kconfig             |    1 +
+ arch/parisc/include/asm/cache.h |   11 ++++++++++-
+ 2 files changed, 11 insertions(+), 1 deletion(-)
+
+--- a/arch/parisc/Kconfig
++++ b/arch/parisc/Kconfig
+@@ -15,6 +15,7 @@ config PARISC
+       select ARCH_SPLIT_ARG64 if !64BIT
+       select ARCH_SUPPORTS_HUGETLBFS if PA20
+       select ARCH_SUPPORTS_MEMORY_FAILURE
++      select ARCH_HAS_CACHE_LINE_SIZE
+       select DMA_OPS
+       select RTC_CLASS
+       select RTC_DRV_GENERIC
+--- a/arch/parisc/include/asm/cache.h
++++ b/arch/parisc/include/asm/cache.h
+@@ -20,7 +20,16 @@
+ #define SMP_CACHE_BYTES L1_CACHE_BYTES
+-#define ARCH_DMA_MINALIGN     L1_CACHE_BYTES
++#ifdef CONFIG_PA20
++#define ARCH_DMA_MINALIGN     128
++#else
++#define ARCH_DMA_MINALIGN     32
++#endif
++#define ARCH_KMALLOC_MINALIGN 16      /* ldcw requires 16-byte alignment */
++
++#define arch_slab_minalign()  ((unsigned)dcache_stride)
++#define cache_line_size()     dcache_stride
++#define dma_get_cache_alignment cache_line_size
+ #define __read_mostly __section(".data..read_mostly")
index 3806188be65e5ec81f6f951d00e1ad29c5db332f..ebcfb6f8518cc9bdcf130c3afd623d4008400a4f 100644 (file)
@@ -282,3 +282,4 @@ counter-stm32-timer-cnt-add-check-for-clk_enable.patch
 staging-greybus-uart-fix-atomicity-violation-in-get_.patch
 alsa-hda-realtek-update-alc256-depop-procedure.patch
 apparmor-fix-do-simple-duplicate-message-elimination.patch
+parisc-fix-a-possible-dma-corruption.patch