iommu/vt-d: Unconditionally flush device TLB for pasid table updates

[ Upstream commit 1f5e307ca16c0c19186cbd56ac460a687e6daba0 ]

The caching mode of an IOMMU is irrelevant to the behavior of the device
TLB. Previously, commit <304b3bde24b5> ("iommu/vt-d: Remove caching mode
check before device TLB flush") removed this redundant check in the
domain unmap path.

Checking the caching mode before flushing the device TLB after a pasid
table entry is updated is unnecessary and can lead to inconsistent
behavior.

Extends this consistency by removing the caching mode check in the pasid
table update path.

Suggested-by: Yi Liu <yi.l.liu@intel.com>
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Link: https://lore.kernel.org/r/20240820030208.20020-1-baolu.lu@linux.intel.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c
index aabcdf7565817841b65f39ecf1984929de301da8..57dd3530f68d4a54ef2184fa3642cf1aa25b6499 100644 (file)
--- a/drivers/iommu/intel/pasid.c
+++ b/drivers/iommu/intel/pasid.c
@@ -261,9 +261,7 @@ void intel_pasid_tear_down_entry(struct intel_iommu *iommu, struct device *dev,
        else
                iommu->flush.flush_iotlb(iommu, did, 0, 0, DMA_TLB_DSI_FLUSH);
 
-       /* Device IOTLB doesn't need to be flushed in caching mode. */
-       if (!cap_caching_mode(iommu->cap))
-               devtlb_invalidation_with_pasid(iommu, dev, pasid);
+       devtlb_invalidation_with_pasid(iommu, dev, pasid);
 }
 
 /*
@@ -490,9 +488,7 @@ int intel_pasid_setup_dirty_tracking(struct intel_iommu *iommu,
 
        iommu->flush.flush_iotlb(iommu, did, 0, 0, DMA_TLB_DSI_FLUSH);
 
-       /* Device IOTLB doesn't need to be flushed in caching mode. */
-       if (!cap_caching_mode(iommu->cap))
-               devtlb_invalidation_with_pasid(iommu, dev, pasid);
+       devtlb_invalidation_with_pasid(iommu, dev, pasid);
 
        return 0;
 }
@@ -569,9 +565,7 @@ void intel_pasid_setup_page_snoop_control(struct intel_iommu *iommu,
        pasid_cache_invalidation_with_pasid(iommu, did, pasid);
        qi_flush_piotlb(iommu, did, pasid, 0, -1, 0);
 
-       /* Device IOTLB doesn't need to be flushed in caching mode. */
-       if (!cap_caching_mode(iommu->cap))
-               devtlb_invalidation_with_pasid(iommu, dev, pasid);
+       devtlb_invalidation_with_pasid(iommu, dev, pasid);
 }
 
 /**