Fix 64-bit addition in prologue.

2019-06-25  Andrew Stubbs  <ams@codesourcery.com>

	Backport from mainline
	2019-05-24  Andrew Stubbs  <ams@codesourcery.com>

	gcc/
	* config/gcn/gcn.c (gcn_expand_prologue): Use gen_addsi3_scalar_carry
	for lo-part.

From-SVN: r272641

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b2534affc4b5e360d963f6926007767d7a117d4e..8e9c869eee4c1d35cea9f7f61c93b9fbc2fedb7a 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2019-06-25  Andrew Stubbs  <ams@codesourcery.com>
+
+       Backport from mainline
+       2019-05-24  Andrew Stubbs  <ams@codesourcery.com>
+
+       * config/gcn/gcn.c (gcn_expand_prologue): Use gen_addsi3_scalar_carry
+       for lo-part.
+
 2019-06-21  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/90930

diff --git a/gcc/config/gcn/gcn.c b/gcc/config/gcn/gcn.c
index 1dd2ff2d4f0aa81dca992517ef435d8e6a38f893..f1fad3bb7b5b7058d8f96361fc9cf5d4e9199b25 100644 (file)
--- a/gcc/config/gcn/gcn.c
+++ b/gcc/config/gcn/gcn.c
@@ -2826,9 +2826,9 @@ gcn_expand_prologue ()
       emit_move_insn (fp_lo, gen_rtx_REG (SImode, 0));
       emit_insn (gen_andsi3_scc (fp_hi, gen_rtx_REG (SImode, 1),
                                 gen_int_mode (0xffff, SImode)));
-      emit_insn (gen_addsi3_scc (fp_lo, fp_lo, wave_offset));
-      emit_insn (gen_addcsi3_scalar_zero (fp_hi, fp_hi,
-                                         gen_rtx_REG (BImode, SCC_REG)));
+      rtx scc = gen_rtx_REG (BImode, SCC_REG);
+      emit_insn (gen_addsi3_scalar_carry (fp_lo, fp_lo, wave_offset, scc));
+      emit_insn (gen_addcsi3_scalar_zero (fp_hi, fp_hi, scc));
 
       if (sp_adjust > 0)
        emit_insn (gen_adddi3_scc (sp, fp, gen_int_mode (sp_adjust, DImode)));