rs6000: enable cbranchcc4

This patch enables "have_cbranchcc4" on rs6000 by defining a
"cbranchcc4" expander. "have_cbrnachcc4" is a flag in ifcvt.cc to
indicate if branching by CC bits is valid or not. With this flag
enabled, some branches can be optimized to conditional moves.

2022-12-07  Haochen Gui <guihaoc@linux.ibm.com>

gcc/
	* config/rs6000/rs6000.md (cbranchcc4): New expander.

gcc/testsuite
	* gcc.target/powerpc/cbranchcc4-1.c: New.
	* gcc.target/powerpc/cbranchcc4-2.c: New.

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 4bd1dfd3da9b68036c37b0d9e76ff2d834d8a308..6011f5bf76adc9fea859bf094482249e7e6843c3 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -11913,6 +11913,16 @@
   DONE;
 })
 
+(define_expand "cbranchcc4"
+  [(set (pc)
+       (if_then_else (match_operator 0 "branch_comparison_operator"
+                       [(match_operand 1 "cc_reg_operand")
+                        (match_operand 2 "zero_constant")])
+                     (label_ref (match_operand 3))
+                     (pc)))]
+  ""
+  "")
+
 (define_expand "cstore<mode>4_signed"
   [(use (match_operator 1 "signed_comparison_operator"
          [(match_operand:P 2 "gpc_reg_operand")

diff --git a/gcc/testsuite/gcc.target/powerpc/cbranchcc4-1.c b/gcc/testsuite/gcc.target/powerpc/cbranchcc4-1.c
new file mode 100644 (file)
index 0000000..6c2cd13
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/cbranchcc4-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+/* Verify there is no ICE with cbranchcc4 enabled.  */
+
+int foo (double d)
+{
+  if (d == 0.0)
+    return 0;
+
+  d = ((d) >= 0 ? (d) : -(d));
+
+  if (d < 1.0)
+    return 1;
+}

diff --git a/gcc/testsuite/gcc.target/powerpc/cbranchcc4-2.c b/gcc/testsuite/gcc.target/powerpc/cbranchcc4-2.c
new file mode 100644 (file)
index 0000000..528ba1a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/cbranchcc4-2.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-rtl-ce1" } */
+/* { dg-final { scan-rtl-dump "noce_try_store_flag_constants" "ce1" } } */
+
+/* The inner branch should be detected by ifcvt then be converted to a setcc
+   with a plus by noce_try_store_flag_constants.  */
+
+int test (unsigned int a, unsigned int b)
+{
+    return (a < b ? 0 : (a > b ? 2 : 1));
+}