]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
backport: re PR target/71338 ([RL78] mulu instruction not used on G10)
authorOleg Endo <olegendo@gcc.gnu.org>
Thu, 18 Aug 2016 12:14:33 +0000 (12:14 +0000)
committerOleg Endo <olegendo@gcc.gnu.org>
Thu, 18 Aug 2016 12:14:33 +0000 (12:14 +0000)
gcc/
Backport from mainline
2016-06-17  DJ Delorie  <dj@redhat.com>

PR target/71338
* config/rl78/rl78-expand.c (umulqihi3): Enable for G10.
* config/rl78/rl78-virtual.c (umulhi3_shift_virt): Likewise.
(umulqihi3_virt): Likewise.
* config/rl78/rl78-real.c (umulhi3_shift_real): Likewise.
(umulqihi3_real): Likewise.

From-SVN: r239568

gcc/ChangeLog
gcc/config/rl78/rl78-expand.md
gcc/config/rl78/rl78-real.md
gcc/config/rl78/rl78-virt.md

index e43ccb078708afd6769a0ba1ff610387c1f4bd5c..a360693d1d8b340af889a02ae44bd9252f8e8423 100644 (file)
@@ -1,3 +1,15 @@
+2016-08-18  Oleg Endo  <olegendo@gcc.gnu.org>
+
+       Backport from mainline
+       2016-06-17  DJ Delorie  <dj@redhat.com>
+
+       PR target/71338
+       * config/rl78/rl78-expand.c (umulqihi3): Enable for G10.
+       * config/rl78/rl78-virtual.c (umulhi3_shift_virt): Likewise.
+       (umulqihi3_virt): Likewise.
+       * config/rl78/rl78-real.c (umulhi3_shift_real): Likewise.
+       (umulqihi3_real): Likewise.
+
 2016-08-16  Eric Botcazou  <ebotcazou@adacore.com>
 
        * doc/install.texi (*-*-solaris2*): Adjust latest change.
index 0335a4d2a68144669f93d04f25826fcb6524627e..3836a41377afb46ec9acc96dc2a51a50067c6c2c 100644 (file)
   [(set (match_operand:HI 0 "register_operand")
         (mult:HI (zero_extend:HI (match_operand:QI 1 "register_operand"))
                  (zero_extend:HI (match_operand:QI 2 "register_operand"))))]
-  "!TARGET_G10"
+  ""
   ""
 )
 
index f6ab7ff42138b5a02a6ead9e7420c9a3d14c1bba..3f3e9c35a3e1e1cc1137d8ac29c9a1033de56fea 100644 (file)
   [(set (match_operand:HI 0 "register_operand" "=A,A")
         (mult:HI (match_operand:HI 1 "rl78_nonfar_operand" "0,0")
                  (match_operand:HI 2 "rl78_24_operand" "N,i")))]
-  "rl78_real_insns_ok () && !TARGET_G10"
+  "rl78_real_insns_ok ()"
   "@
    shlw\t%0, 1
    shlw\t%0, 2"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=A")
         (mult:HI (zero_extend:HI (match_operand:QI 1 "general_operand" "%a"))
                  (zero_extend:HI (match_operand:QI 2 "general_operand" "x"))))]
-  "rl78_real_insns_ok () && !TARGET_G10"
+  "rl78_real_insns_ok ()"
   "mulu\t%2"
 )
 
index e90e156a8d1f0a80cc1afeeb04b0ca10d88b4584..cbdb9888b775716d1d50345c9d1af508f575a769 100644 (file)
   [(set (match_operand:HI 0 "register_operand" "=vm")
         (mult:HI (match_operand:HI 1 "rl78_nonfar_operand" "%vim")
                  (match_operand:HI 2 "rl78_24_operand" "Ni")))]
-  "rl78_virt_insns_ok () && !TARGET_G10"
+  "rl78_virt_insns_ok ()"
   "v.mulu\t%0, %1, %2"
   [(set_attr "valloc" "umul")]
 )
   [(set (match_operand:HI 0 "register_operand" "=vm")
         (mult:HI (zero_extend:HI (match_operand:QI 1 "rl78_nonfar_operand" "%vim"))
                  (zero_extend:HI (match_operand:QI 2 "general_operand" "vim"))))]
-  "rl78_virt_insns_ok () && !TARGET_G10"
+  "rl78_virt_insns_ok ()"
   "v.mulu\t%0, %2"
   [(set_attr "valloc" "umul")]
 )