m68k.md (adddi_dilshr32): One of the operands must be a register.

H
        * m68k.md (adddi_dilshr32): One of the operands must be a register.
        (adddi_dishl32): Similarly.
Fixes egcs-1.1 regression.

From-SVN: r21737

diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index 07b13fed75914f4b162eb6303094714dd2985b0e..de3c84625faa11a4c57ecc8346ba7fcb94eace2d 100644 (file)
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -2095,13 +2095,13 @@
 } ")
 
 (define_insn "adddi_dilshr32"
-  [(set (match_operand:DI 0 "general_operand" "=do")
+  [(set (match_operand:DI 0 "general_operand" "=d,o")
 ;;    (plus:DI (match_operand:DI 2 "general_operand" "%0")
 ;;     (lshiftrt:DI (match_operand:DI 1 "general_operand" "ro")
 ;;            (const_int 32))))]
-    (plus:DI (lshiftrt:DI (match_operand:DI 1 "general_operand" "ro")
+    (plus:DI (lshiftrt:DI (match_operand:DI 1 "general_operand" "o,r")
             (const_int 32))
-        (match_operand:DI 2 "general_operand" "0")))]
+        (match_operand:DI 2 "general_operand" "0,0")))]
   ""
   "*
 {
@@ -2114,13 +2114,13 @@
 } ")
 
 (define_insn "adddi_dishl32"
-  [(set (match_operand:DI 0 "general_operand" "=ro")
+  [(set (match_operand:DI 0 "general_operand" "=r,o")
 ;;    (plus:DI (match_operand:DI 2 "general_operand" "%0")
 ;;     (ashift:DI (match_operand:DI 1 "general_operand" "ro")
 ;;            (const_int 32))))]
-    (plus:DI (ashift:DI (match_operand:DI 1 "general_operand" "ro")
+    (plus:DI (ashift:DI (match_operand:DI 1 "general_operand" "o,r")
             (const_int 32))
-        (match_operand:DI 2 "general_operand" "0")))]
+        (match_operand:DI 2 "general_operand" "0,0")))]
   ""
   "*
 {