aarch64: Merge mov<ALLI>cc with mov<GPF>cc

The bodies of `mov<ALLI>cc` and `mov<GPF>cc` are identical, so merge
them by using a new mode iterator that combines `ALLI` and `GPF`.

gcc/ChangeLog:

	* config/aarch64/aarch64.md (mov<ALLI>cc): Merge with ...
	(mov<ALLI>cc): ... this.
	* config/aarch64/iterators.md(ALLI_GPF): New mode iterator.

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index e2b8d5d3af969d70f6fbf70e7b4d969cf62a046b..2ef79f448fd02c37c0e1d4b1be7a4ea7bbbdab57 100644 (file)
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -4797,11 +4797,11 @@
   [(set_attr "type" "fcsel")]
 )
 
-(define_expand "mov<mode>cc"
-  [(set (match_operand:ALLI 0 "register_operand")
-       (if_then_else:ALLI (match_operand 1 "aarch64_comparison_operator")
-                          (match_operand:ALLI 2 "register_operand")
-                          (match_operand:ALLI 3 "register_operand")))]
+(define_expand "mov<ALLI_GPF:mode>cc"
+  [(set (match_operand:ALLI_GPF 0 "register_operand")
+       (if_then_else:ALLI_GPF (match_operand 1 "aarch64_comparison_operator")
+                          (match_operand:ALLI_GPF 2 "register_operand")
+                          (match_operand:ALLI_GPF 3 "register_operand")))]
   ""
   {
     enum rtx_code code = GET_CODE (operands[1]);
@@ -4847,31 +4847,6 @@
   }
 )
 
-(define_expand "mov<mode>cc"
-  [(set (match_operand:GPF 0 "register_operand")
-       (if_then_else:GPF (match_operand 1 "aarch64_comparison_operator")
-                         (match_operand:GPF 2 "register_operand")
-                         (match_operand:GPF 3 "register_operand")))]
-  ""
-  {
-    enum rtx_code code = GET_CODE (operands[1]);
-    if (code == UNEQ || code == LTGT)
-      FAIL;
-
-    rtx ccreg = XEXP (operands[1], 0);
-    enum machine_mode ccmode = GET_MODE (ccreg);
-    if (GET_MODE_CLASS (ccmode) == MODE_CC)
-      gcc_assert (XEXP (operands[1], 1) == const0_rtx);
-    else if (ccmode == QImode || ccmode == HImode)
-      FAIL;
-    else
-      {
-       ccreg = aarch64_gen_compare_reg (code, ccreg, XEXP (operands[1], 1));
-       operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
-      }
-  }
-)
-
 (define_expand "<neg_not_op><mode>cc"
   [(set (match_operand:GPI 0 "register_operand")
        (if_then_else:GPI (match_operand 1 "aarch64_comparison_operator")

diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
index 517b2808b5f725db81709122848817aaafff1f34..32e5009a1f96a27af47d12c919211e4fb27579a1 100644 (file)
--- a/gcc/config/aarch64/iterators.md
+++ b/gcc/config/aarch64/iterators.md
@@ -65,6 +65,10 @@
 ;; Iterator for all 16-bit scalar floating point modes (HF, BF)
 (define_mode_iterator HFBF [HF BF])
 
+;; Iterator for all integer modes (up to 64-bit) plus all General Purpose
+;; Floating-point registers (32- and 64-bit modes).
+(define_mode_iterator ALLI_GPF [ALLI GPF])
+
 ;; Iterator for all scalar floating point modes suitable for moving, including
 ;; special BF type and decimal floating point types (HF, SF, DF, TF, BF,
 ;; SD, DD and TD)