aarch64: Fix crc{,_rev}<SWI124:mode>si4 expanders [PR122991]

The newly added gcc.dg/pr122991.c test fails also on aarch64.
The problem is the same as on x86 which has been fixed in r16-5882,
while the last operand is guaranteed to be a CONST_INT of the right
mode initially, maybe_legitimize_operands can change that if some earlier
operand has the same value and e.g. register_operand predicate has been
used, that operand is forced into a pseudo and maybe_legitimize_operands
then checks if that satisfies the predicate of the other operand.
As on x86 and aarch64 it didn't have any predicate, it happily used
a pseudo in those cases instead of the expected CONST_INT.

The following patch fixes that.

2025-12-04  Jakub Jelinek  <jakub@redhat.com>

	PR target/122991
	* config/aarch64/aarch64.md (crc_rev<ALLI:mode><ALLX:mode>4,
	crc<ALLI:mode><ALLX:mode>4): Use const_int_operand predicate for
	the last operand.

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index fde4fabb7ef49ae41e164d47835fb33a812f5e35..8beeefca65ee3b6d8d881713b04d0ca62c4be490 100644 (file)
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -4917,7 +4917,7 @@
    ;; data
    (match_operand:ALLI 2 "register_operand" "r")
    ;; polynomial without leading 1
-   (match_operand:ALLX 3)]
+   (match_operand:ALLX 3 "const_int_operand")]
   ""
   {
     /* If the polynomial is the same as the polynomial of crc32c* instruction,
@@ -4956,7 +4956,7 @@
    ;; data
    (match_operand:ALLI 2 "register_operand" "r")
    ;; polynomial without leading 1
-   (match_operand:ALLX 3)]
+   (match_operand:ALLX 3 "const_int_operand")]
   "TARGET_AES && <ALLI:sizen> <= <ALLX:sizen>"
   {
     aarch64_expand_crc_using_pmull (<ALLX:MODE>mode, <ALLI:MODE>mode,