phy: move phy-qcom-snps-eusb2 out of its vendor sub-directory

As not only Qualcomm, but also Samsung is using the Synopsys eUSB2 IP
(albeit with a different register layout) in their newer SoCs, move the
driver out of its vendor sub-directory and rename it to phy-snps-eusb2.

Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250504144527.1723980-4-ivo.ivanov.ivanov1@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 8d58efe998ec5fd50054eed2c90d6ecce6bd5dd8..11c166204b12020cba3ff0bc4bb8e91663314a61 100644 (file)
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -43,6 +43,14 @@ config PHY_PISTACHIO_USB
        help
          Enable this to support the USB2.0 PHY on the IMG Pistachio SoC.
 
+config PHY_SNPS_EUSB2
+       tristate "SNPS eUSB2 PHY Driver"
+       depends on OF && (ARCH_QCOM || COMPILE_TEST)
+       select GENERIC_PHY
+       help
+         Enable support for the USB high-speed SNPS eUSB2 phy on select
+         SoCs. The PHY is usually paired with a Synopsys DWC3 USB controller.
+
 config PHY_XGENE
        tristate "APM X-Gene 15Gbps PHY support"
        depends on HAS_IOMEM && OF && (ARCH_XGENE || COMPILE_TEST)

diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index e281442acc752820fe0bd638dfe38986a37c2a78..c670a8dac46807863c9ef990beb149082238ad16 100644 (file)
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_PHY_CAN_TRANSCEIVER)       += phy-can-transceiver.o
 obj-$(CONFIG_PHY_LPC18XX_USB_OTG)      += phy-lpc18xx-usb-otg.o
 obj-$(CONFIG_PHY_XGENE)                        += phy-xgene.o
 obj-$(CONFIG_PHY_PISTACHIO_USB)                += phy-pistachio-usb.o
+obj-$(CONFIG_PHY_SNPS_EUSB2)           += phy-snps-eusb2.o
 obj-$(CONFIG_USB_LGM_PHY)              += phy-lgm-usb.o
 obj-$(CONFIG_PHY_AIROHA_PCIE)          += phy-airoha-pcie.o
 obj-$(CONFIG_PHY_NXP_PTN3222)          += phy-nxp-ptn3222.o

diff --git a/drivers/phy/qualcomm/phy-qcom-snps-eusb2.c b/drivers/phy/phy-snps-eusb2.c
similarity index 100%
rename from drivers/phy/qualcomm/phy-qcom-snps-eusb2.c
rename to drivers/phy/phy-snps-eusb2.c

diff --git a/drivers/phy/qualcomm/Kconfig b/drivers/phy/qualcomm/Kconfig
index c1e0a11ddd76c2056eb2e72a287ece4def2cf5d8..ef14f4e33973cff4103d8ea3b07cfd62d344e450 100644 (file)
--- a/drivers/phy/qualcomm/Kconfig
+++ b/drivers/phy/qualcomm/Kconfig
@@ -125,15 +125,6 @@ config PHY_QCOM_QUSB2
          PHY which is usually paired with either the ChipIdea or Synopsys DWC3
          USB IPs on MSM SOCs.
 
-config PHY_QCOM_SNPS_EUSB2
-       tristate "Qualcomm SNPS eUSB2 PHY Driver"
-       depends on OF && (ARCH_QCOM || COMPILE_TEST)
-       select GENERIC_PHY
-       help
-         Enable support for the USB high-speed SNPS eUSB2 phy on Qualcomm
-         chipsets. The PHY is paired with a Synopsys DWC3 USB controller
-         on Qualcomm SOCs.
-
 config PHY_QCOM_EUSB2_REPEATER
        tristate "Qualcomm SNPS eUSB2 Repeater Driver"
        depends on OF && (ARCH_QCOM || COMPILE_TEST)

diff --git a/drivers/phy/qualcomm/Makefile b/drivers/phy/qualcomm/Makefile
index 42038bc30974a376bb2e3749d57d0518a82c35fe..3851e28a212d4a677a5b41805868f38b9ab49841 100644 (file)
--- a/drivers/phy/qualcomm/Makefile
+++ b/drivers/phy/qualcomm/Makefile
@@ -15,7 +15,6 @@ obj-$(CONFIG_PHY_QCOM_QMP_USB)                += phy-qcom-qmp-usb.o
 obj-$(CONFIG_PHY_QCOM_QMP_USB_LEGACY)  += phy-qcom-qmp-usb-legacy.o
 
 obj-$(CONFIG_PHY_QCOM_QUSB2)           += phy-qcom-qusb2.o
-obj-$(CONFIG_PHY_QCOM_SNPS_EUSB2)      += phy-qcom-snps-eusb2.o
 obj-$(CONFIG_PHY_QCOM_EUSB2_REPEATER)  += phy-qcom-eusb2-repeater.o
 obj-$(CONFIG_PHY_QCOM_UNIPHY_PCIE_28LP)        += phy-qcom-uniphy-pcie-28lp.o
 obj-$(CONFIG_PHY_QCOM_USB_HS)          += phy-qcom-usb-hs.o