]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/xe: Update register definitions in LRC layout header
authorXin Wang <x.wang@intel.com>
Fri, 11 Jul 2025 06:09:24 +0000 (06:09 +0000)
committerLucas De Marchi <lucas.demarchi@intel.com>
Mon, 14 Jul 2025 15:34:44 +0000 (08:34 -0700)
Update the register definitions in xe_lrc_layout.h to align with the
official hardware specification (Bspec) terminology. Specifically:

- rename PVC_CTX_ACC_CTR_THOLD to CTX_ACC_CTR_THOLD
- rename PVC_CTX_ASID to CTX_ASID

Signed-off-by: Xin Wang <x.wang@intel.com>
Reviewed-by: Stuart Summers <stuart.summers@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20250711060924.7373-1-x.wang@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
drivers/gpu/drm/xe/regs/xe_lrc_layout.h
drivers/gpu/drm/xe/xe_lrc.c

index 11417c2d07dda81d061df7a436aafc131617fd96..1b101edb838bf5e32df52edea8ae29aebbd5f8a5 100644 (file)
@@ -17,6 +17,8 @@
 #define CTX_TIMESTAMP                  (0x22 + 1)
 #define CTX_TIMESTAMP_UDW              (0x24 + 1)
 #define CTX_INDIRECT_RING_STATE                (0x26 + 1)
+#define CTX_ACC_CTR_THOLD              (0x2a + 1)
+#define CTX_ASID                       (0x2e + 1)
 #define CTX_PDP0_UDW                   (0x30 + 1)
 #define CTX_PDP0_LDW                   (0x32 + 1)
 
index 61b1935d1c462a6816e0cd0a08dfcd93a5a8e28f..0769d759b558862e9c907aa6ea30874c57e61ed3 100644 (file)
@@ -1147,9 +1147,6 @@ setup_indirect_ctx(struct xe_lrc *lrc, struct xe_hw_engine *hwe)
        return 0;
 }
 
-#define PVC_CTX_ASID           (0x2e + 1)
-#define PVC_CTX_ACC_CTR_THOLD  (0x2a + 1)
-
 static int xe_lrc_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
                       struct xe_vm *vm, u32 ring_size, u16 msix_vec,
                       u32 init_flags)
@@ -1271,7 +1268,7 @@ static int xe_lrc_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
                xe_lrc_write_ctx_reg(lrc, CTX_TIMESTAMP_UDW, 0);
 
        if (xe->info.has_asid && vm)
-               xe_lrc_write_ctx_reg(lrc, PVC_CTX_ASID, vm->usm.asid);
+               xe_lrc_write_ctx_reg(lrc, CTX_ASID, vm->usm.asid);
 
        lrc->desc = LRC_VALID;
        lrc->desc |= FIELD_PREP(LRC_ADDRESSING_MODE, LRC_LEGACY_64B_CONTEXT);