]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amd/pm: Drop legacy message fields from SMUv13
authorLijo Lazar <lijo.lazar@amd.com>
Tue, 16 Dec 2025 08:47:45 +0000 (14:17 +0530)
committerAlex Deucher <alexander.deucher@amd.com>
Sat, 10 Jan 2026 19:08:43 +0000 (14:08 -0500)
Remove usage of legacy message related fields from SMUv13 SOCs.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c

index fabf61e15dbadc20a67bc75762c65c6f69f9dc92..efeaa3d577123a8e07f236903a529334fcb10b69 100644 (file)
@@ -251,7 +251,6 @@ int smu_v13_0_od_edit_dpm_table(struct smu_context *smu,
 
 int smu_v13_0_set_default_dpm_tables(struct smu_context *smu);
 
-void smu_v13_0_set_smu_mailbox_registers(struct smu_context *smu);
 void smu_v13_0_init_msg_ctl(struct smu_context *smu,
                            const struct cmn2asic_msg_mapping *message_map);
 
index 76edb54972dc2d3157593a13b297c982ac2bd6bf..94b8e5dd76b501dcb9a7fa96912818ed79db70fc 100644 (file)
@@ -2034,11 +2034,9 @@ static const struct pptable_funcs aldebaran_ppt_funcs = {
 void aldebaran_set_ppt_funcs(struct smu_context *smu)
 {
        smu->ppt_funcs = &aldebaran_ppt_funcs;
-       smu->message_map = aldebaran_message_map;
        smu->clock_map = aldebaran_clk_map;
        smu->feature_map = aldebaran_feature_mask_map;
        smu->table_map = aldebaran_table_map;
        smu->smc_driver_if_version = SMU13_DRIVER_IF_VERSION_ALDE;
-       smu_v13_0_set_smu_mailbox_registers(smu);
        smu_v13_0_init_msg_ctl(smu, aldebaran_message_map);
 }
index b941ab24f8238acaefdf80747e8828ac8c06018a..34ff4c35baff5d8aef87ef2b64b4e571a8d26fcd 100644 (file)
@@ -2351,15 +2351,6 @@ int smu_v13_0_set_default_dpm_tables(struct smu_context *smu)
                                    smu_table->clocks_table, false);
 }
 
-void smu_v13_0_set_smu_mailbox_registers(struct smu_context *smu)
-{
-       struct amdgpu_device *adev = smu->adev;
-
-       smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);
-       smu->msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_66);
-       smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
-}
-
 void smu_v13_0_init_msg_ctl(struct smu_context *smu,
                            const struct cmn2asic_msg_mapping *message_map)
 {
index 128fb68abf705c127ccf639c7caea9e30e13a081..37941b6c28312e8ee95d980a8f96cd3ff6b2bbd9 100644 (file)
 
 #define MP0_MP1_DATA_REGION_SIZE_COMBOPPTABLE  0x4000
 
-#define mmMP1_SMN_C2PMSG_66                                                                            0x0282
-#define mmMP1_SMN_C2PMSG_66_BASE_IDX                                                                   0
-
-#define mmMP1_SMN_C2PMSG_82                                                                            0x0292
-#define mmMP1_SMN_C2PMSG_82_BASE_IDX                                                                   0
-
-#define mmMP1_SMN_C2PMSG_90                                                                            0x029a
-#define mmMP1_SMN_C2PMSG_90_BASE_IDX                                                                   0
-
 #define mmMP1_SMN_C2PMSG_75                                                                            0x028b
 #define mmMP1_SMN_C2PMSG_75_BASE_IDX                                                                   0
 
@@ -2895,10 +2886,6 @@ static void smu_v13_0_0_set_smu_mailbox_registers(struct smu_context *smu)
 {
        struct amdgpu_device *adev = smu->adev;
 
-       smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);
-       smu->msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_66);
-       smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
-
        smu->debug_param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_53);
        smu->debug_msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_75);
        smu->debug_resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_54);
@@ -3223,7 +3210,6 @@ static const struct pptable_funcs smu_v13_0_0_ppt_funcs = {
 void smu_v13_0_0_set_ppt_funcs(struct smu_context *smu)
 {
        smu->ppt_funcs = &smu_v13_0_0_ppt_funcs;
-       smu->message_map = smu_v13_0_0_message_map;
        smu->clock_map = smu_v13_0_0_clk_map;
        smu->feature_map = smu_v13_0_0_feature_mask_map;
        smu->table_map = smu_v13_0_0_table_map;
index d8ef38535fe8187ab6b2175feba63e075cc11e75..7ca9adfa2446e646cccb838d00083be7373cc085 100644 (file)
@@ -1124,15 +1124,6 @@ static const struct pptable_funcs smu_v13_0_4_ppt_funcs = {
        .set_gfx_power_up_by_imu = smu_v13_0_set_gfx_power_up_by_imu,
 };
 
-static void smu_v13_0_4_set_smu_mailbox_registers(struct smu_context *smu)
-{
-       struct amdgpu_device *adev = smu->adev;
-
-       smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);
-       smu->msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_66);
-       smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
-}
-
 static void smu_v13_0_4_init_msg_ctl(struct smu_context *smu)
 {
        struct amdgpu_device *adev = smu->adev;
@@ -1154,17 +1145,13 @@ void smu_v13_0_4_set_ppt_funcs(struct smu_context *smu)
        struct amdgpu_device *adev = smu->adev;
 
        smu->ppt_funcs = &smu_v13_0_4_ppt_funcs;
-       smu->message_map = smu_v13_0_4_message_map;
        smu->feature_map = smu_v13_0_4_feature_mask_map;
        smu->table_map = smu_v13_0_4_table_map;
        smu->smc_driver_if_version = SMU13_0_4_DRIVER_IF_VERSION;
        smu->is_apu = true;
 
-       if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 4)) {
-               smu_v13_0_4_set_smu_mailbox_registers(smu);
+       if (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 4))
                smu_v13_0_4_init_msg_ctl(smu);
-       } else {
-               smu_v13_0_set_smu_mailbox_registers(smu);
+       else
                smu_v13_0_init_msg_ctl(smu, smu_v13_0_4_message_map);
-       }
 }
index f351880a5e9734d4bc71ddc76c5e72818878578a..29ec02f2dd6ae061aa3f658b32c816e21be6155b 100644 (file)
@@ -1144,16 +1144,10 @@ static void smu_v13_0_5_init_msg_ctl(struct smu_context *smu)
 
 void smu_v13_0_5_set_ppt_funcs(struct smu_context *smu)
 {
-       struct amdgpu_device *adev = smu->adev;
-
        smu->ppt_funcs = &smu_v13_0_5_ppt_funcs;
-       smu->message_map = smu_v13_0_5_message_map;
        smu->feature_map = smu_v13_0_5_feature_mask_map;
        smu->table_map = smu_v13_0_5_table_map;
        smu->is_apu = true;
        smu->smc_driver_if_version = SMU13_0_5_DRIVER_IF_VERSION;
-       smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_C2PMSG_34);
-       smu->msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_C2PMSG_2);
-       smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_C2PMSG_33);
        smu_v13_0_5_init_msg_ctl(smu);
 }
index cf011fc3bb618b801fe817ef2720bbf287a15b40..d76ac14a8a64058c7cad035cf4d28dd92ee911a9 100644 (file)
@@ -3899,8 +3899,10 @@ static const struct pptable_funcs smu_v13_0_6_ppt_funcs = {
 
 void smu_v13_0_6_set_ppt_funcs(struct smu_context *smu)
 {
+       const struct cmn2asic_msg_mapping *message_map;
+
        smu->ppt_funcs = &smu_v13_0_6_ppt_funcs;
-       smu->message_map = (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12)) ?
+       message_map = (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12)) ?
                smu_v13_0_12_message_map : smu_v13_0_6_message_map;
        smu->clock_map = smu_v13_0_6_clk_map;
        smu->feature_map = (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(13, 0, 12)) ?
@@ -3908,8 +3910,7 @@ void smu_v13_0_6_set_ppt_funcs(struct smu_context *smu)
        smu->table_map = smu_v13_0_6_table_map;
        smu->smc_driver_if_version = SMU_IGNORE_IF_VERSION;
        smu->smc_fw_caps |= SMU_FW_CAP_RAS_PRI;
-       smu_v13_0_set_smu_mailbox_registers(smu);
-       smu_v13_0_init_msg_ctl(smu, smu->message_map);
+       smu_v13_0_init_msg_ctl(smu, message_map);
        smu_v13_0_6_set_temp_funcs(smu);
        amdgpu_mca_smu_init_funcs(smu->adev, &smu_v13_0_6_mca_smu_funcs);
        amdgpu_aca_set_smu_funcs(smu->adev, &smu_v13_0_6_aca_smu_funcs);
index d8f2059a16317b619f4588ff1519643eac883b40..0375e8484b2a93290bdd1365788f938a64787f8c 100644 (file)
@@ -2809,13 +2809,11 @@ static const struct pptable_funcs smu_v13_0_7_ppt_funcs = {
 void smu_v13_0_7_set_ppt_funcs(struct smu_context *smu)
 {
        smu->ppt_funcs = &smu_v13_0_7_ppt_funcs;
-       smu->message_map = smu_v13_0_7_message_map;
        smu->clock_map = smu_v13_0_7_clk_map;
        smu->feature_map = smu_v13_0_7_feature_mask_map;
        smu->table_map = smu_v13_0_7_table_map;
        smu->pwr_src_map = smu_v13_0_7_pwr_src_map;
        smu->workload_map = smu_v13_0_7_workload_map;
        smu->smc_driver_if_version = SMU13_0_7_DRIVER_IF_VERSION;
-       smu_v13_0_set_smu_mailbox_registers(smu);
        smu_v13_0_init_msg_ctl(smu, smu_v13_0_7_message_map);
 }
index 79ec2d235a09f276b4582fd9ef9325c8c29ae317..b4b55a66fb71bb7c4dd829c2468c093f6f909ebb 100644 (file)
@@ -1360,11 +1360,9 @@ static const struct pptable_funcs yellow_carp_ppt_funcs = {
 void yellow_carp_set_ppt_funcs(struct smu_context *smu)
 {
        smu->ppt_funcs = &yellow_carp_ppt_funcs;
-       smu->message_map = yellow_carp_message_map;
        smu->feature_map = yellow_carp_feature_mask_map;
        smu->table_map = yellow_carp_table_map;
        smu->is_apu = true;
        smu->smc_driver_if_version = SMU13_YELLOW_CARP_DRIVER_IF_VERSION;
-       smu_v13_0_set_smu_mailbox_registers(smu);
        smu_v13_0_init_msg_ctl(smu, yellow_carp_message_map);
 }