arm64: dts: qcom: qcs8300: Adds SPMI support

Add the SPMI bus arbiter(Version:5.2.0) node for QCS8300 SoC
which connected with PMICs on QCS8300 boards.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Tingguo Cheng <quic_tingguoc@quicinc.com>
Link: https://lore.kernel.org/r/20250108-adds-spmi-pmic-peripherals-for-qcs8300-v3-1-ee94642279ff@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
index 4a057f7c0d9fae0ebd1b3cf3468746b382bc886b..d08f70731c87a798b88c7ccd713adbc645b9f185 100644 (file)
--- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
@@ -3027,6 +3027,28 @@
                        #clock-cells = <0>;
                };
 
+               spmi_bus: spmi@c440000 {
+                       compatible = "qcom,spmi-pmic-arb";
+                       reg = <0x0 0x0c440000 0x0 0x1100>,
+                             <0x0 0x0c600000 0x0 0x2000000>,
+                             <0x0 0x0e600000 0x0 0x100000>,
+                             <0x0 0x0e700000 0x0 0xa0000>,
+                             <0x0 0x0c40a000 0x0 0x26000>;
+                       reg-names = "core",
+                                   "chnls",
+                                   "obsrvr",
+                                   "intr",
+                                   "cnfg";
+                       qcom,channel = <0>;
+                       qcom,ee = <0>;
+                       interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "periph_irq";
+                       interrupt-controller;
+                       #interrupt-cells = <4>;
+                       #address-cells = <2>;
+                       #size-cells = <0>;
+               };
+
                tlmm: pinctrl@f100000 {
                        compatible = "qcom,qcs8300-tlmm";
                        reg = <0x0 0x0f100000 0x0 0x300000>;