]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: freescale: add support for SolidRun i.MX8MP HummingBoard IIoT
authorJosua Mayer <josua@solid-run.com>
Fri, 13 Mar 2026 12:30:57 +0000 (14:30 +0200)
committerFrank Li <Frank.Li@nxp.com>
Fri, 27 Mar 2026 13:52:40 +0000 (09:52 -0400)
Introduce support for the SolidRun i.MX8MP HummingBoard IIoT platform.
This board is a new design based on the i.MX8MP System on Module and
does not share much hardware with previous HummingBoard variants.

It comes with some common features:
- 3x USB-3.0 Type A connector
- 2x 1Gbps RJ45 Ethernet
- USB Type-C Console Port
- microSD connector
- RTC with backup battery
- RGB Status LED
- 1x M.2 M-Key connector with PCI-E Gen. 3 x1
- 1x M.2 B-Key connector with USB-2.0/3.0 + SIM card holder
- 1x LVDS Display Connector
- 1x DSI Display Connector
- GPIO header
- 2x RS232/RS485 ports (configurable)
- 2x CAN

In addition there is a board-to-board expansion connector to support
custom daughter boards with access to SPI, a range of GPIOs and -
notably - CAN and UART. Both 2x CAN and 2x UART can be muxed either
to this b2b connector, or a terminal block connector on the base board.

The routing choice for UART and CAN is expressed through gpio
mux-controllers in DT and can be changed by applying dtb overlays.

Signed-off-by: Josua Mayer <josua@solid-run.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
arch/arm64/boot/dts/freescale/Makefile
arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot.dts [new file with mode: 0644]

index 960fa4adaefba67bc86bbe5d530a429a528219ce..82175304bdb1a1fd0afe97fdce85aada484a835c 100644 (file)
@@ -239,6 +239,8 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-picoitx.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-edm-g-wb.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-frdm.dtb
+DTC_FLAGS_imx8mp-hummingboard-iiot := -@
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-iiot.dtb
 DTC_FLAGS_imx8mp-hummingboard-mate := -@
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-hummingboard-mate.dtb
 DTC_FLAGS_imx8mp-hummingboard-pro := -@
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot.dts b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-iiot.dts
new file mode 100644 (file)
index 0000000..7c5b77c
--- /dev/null
@@ -0,0 +1,716 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2024 Yazan Shhady <yazan.shhady@solid-run.com>
+ * Copyright 2025 Josua Mayer <josua@solid-run.com>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/phy/phy-imx8-pcie.h>
+
+#include "imx8mp-sr-som.dtsi"
+
+/ {
+       compatible = "solidrun,imx8mp-hummingboard-iiot",
+                    "solidrun,imx8mp-sr-som", "fsl,imx8mp";
+       model = "SolidRun i.MX8MP HummingBoard IIoT";
+
+       /* power for M.2 B-Key connector (J6) */
+       regulator-m2-b {
+               compatible = "regulator-fixed";
+               regulator-name = "m2-b";
+               gpios = <&tca6416_u20 5 GPIO_ACTIVE_HIGH>;
+               regulator-always-on;
+               regulator-max-microvolt = <3300000>;
+               regulator-min-microvolt = <3300000>;
+               enable-active-high;
+       };
+
+       /* power for M.2 M-Key connector (J4) */
+       regulator-m2-m {
+               compatible = "regulator-fixed";
+               regulator-name = "m2-m";
+               gpios = <&tca6416_u20 6 GPIO_ACTIVE_HIGH>;
+               regulator-always-on;
+               regulator-max-microvolt = <3300000>;
+               regulator-min-microvolt = <3300000>;
+               enable-active-high;
+       };
+
+       /* power for USB-A J27 behind USB Hub Port 3 */
+       regulator-vbus-2 {
+               compatible = "regulator-fixed";
+               regulator-name = "vbus2";
+               regulator-always-on;
+               regulator-max-microvolt = <5000000>;
+               regulator-min-microvolt = <5000000>;
+               gpio = <&tca6416_u20 12 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       /* power for USB-A J27 behind USB Hub Port 4 */
+       regulator-vbus-3 {
+               compatible = "regulator-fixed";
+               regulator-name = "vbus3";
+               regulator-always-on;
+               regulator-max-microvolt = <5000000>;
+               regulator-min-microvolt = <5000000>;
+               gpio = <&tca6416_u20 13 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       aliases {
+               /* J10 */
+               ethernet0 = &eqos;
+               /* J11 */
+               ethernet1 = &fec;
+               gpio5 = &tca6408_u48;
+               gpio6 = &tca6408_u37;
+               gpio7 = &tca6416_u20;
+               gpio8 = &tca6416_u21;
+               i2c6 = &i2c_exp;
+               i2c7 = &i2c_csi;
+               i2c8 = &i2c_dsi;
+               i2c9 = &i2c_lvds;
+               rtc0 = &carrier_rtc;
+               rtc1 = &snvs_rtc;
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+
+               wakeup-event {
+                       interrupts-extended = <&tca6416_u21 11 IRQ_TYPE_EDGE_FALLING>;
+                       label = "m2-m-wakeup";
+                       wakeup-source;
+                       linux,code = <KEY_WAKEUP>;
+               };
+       };
+
+       can_mux: mux-controller-0 {
+               compatible = "gpio-mux";
+               /*
+                * Mux routes CAN bus signals between SoM connector pins,
+                * expansion connector (J22) and on-board transceivers using
+                * two GPIO:
+                * - IO3: 0 = on-board transceivers, 1 = expansion connector
+                * - IO4: 0 = J9-55/57/59/61, 1 = J7-12/16 & J9-54/56
+                */
+               mux-gpios = <&tca6416_u20 3 GPIO_ACTIVE_HIGH>,
+                           <&tca6416_u20 4 GPIO_ACTIVE_HIGH>;
+               /* default J7-12/16 & J9-54/56 to on-board transceivers */
+               idle-state = <2>;
+               #mux-control-cells = <0>;
+       };
+
+       spi_mux: mux-controller-1 {
+               compatible = "gpio-mux";
+               /* default on-board */
+               idle-state = <0>;
+               /*
+                * Mux switches spi bus between on-board tpm
+                * and expansion connector (J22).
+                */
+               mux-gpios = <&tca6416_u21 0 GPIO_ACTIVE_HIGH>;
+               #mux-control-cells = <0>;
+       };
+
+       uart3_uart4_b2b_mux: mux-controller-2 {
+               compatible = "gpio-mux";
+               /* default on-board */
+               idle-state = <0>;
+               /*
+                * Mux switches both uart3 and uart4 tx/rx between expansion
+                * connector (J22) and on-board rs232/rs485 transceivers
+                * using one GPIO: 0 = on-board, 1 = connector.
+                */
+               mux-gpios = <&tca6416_u20 0 GPIO_ACTIVE_HIGH>;
+               #mux-control-cells = <0>;
+       };
+
+       uart3_rs_232_485_mux: mux-controller-3 {
+               compatible = "gpio-mux";
+               /* default rs232 */
+               idle-state = <0>;
+               /*
+                * Mux switches uart3 tx/rx between rs232 and rs485
+                * transceivers. using one GPIO: 0 = rs232, 1 = rs485.
+                */
+               mux-gpios = <&tca6416_u20 1 GPIO_ACTIVE_HIGH>;
+               #mux-control-cells = <0>;
+       };
+
+       uart4_rs_232_485_mux: mux-controller-4 {
+               compatible = "gpio-mux";
+               /* default rs232 */
+               idle-state = <0>;
+               /*
+                * Mux switches uart4 tx/rx between rs232 and rs485
+                * transceivers. using one GPIO: 0 = rs232, 1 = rs485.
+                */
+               mux-gpios = <&tca6416_u20 2 GPIO_ACTIVE_HIGH>;
+               #mux-control-cells = <0>;
+       };
+
+       v_1_2: regulator-1-2 {
+               compatible = "regulator-fixed";
+               regulator-name = "1v2";
+               regulator-max-microvolt = <1800000>;
+               regulator-min-microvolt = <1800000>;
+       };
+
+       reg_dsi_panel: regulator-dsi-panel {
+               compatible = "regulator-fixed";
+               regulator-name = "dsi-panel";
+               gpios = <&tca6416_u20 15 GPIO_ACTIVE_HIGH>;
+               regulator-max-microvolt = <11200000>;
+               regulator-min-microvolt = <11200000>;
+               enable-active-high;
+       };
+
+       vmmc: regulator-mmc {
+               compatible = "regulator-fixed";
+               regulator-name = "vmmc";
+               pinctrl-0 = <&vmmc_pins>;
+               pinctrl-names = "default";
+               regulator-max-microvolt = <3300000>;
+               regulator-min-microvolt = <3300000>;
+               startup-delay-us = <250>;
+               gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       /* power for USB-A J5003 */
+       vbus1: regulator-vbus-1 {
+               compatible = "regulator-fixed";
+               regulator-name = "vbus1";
+               regulator-max-microvolt = <5000000>;
+               regulator-min-microvolt = <5000000>;
+               gpio = <&tca6416_u20 14 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       rfkill-m2-b-gnss {
+               compatible = "rfkill-gpio";
+               /* rfkill-gpio inverts internally */
+               shutdown-gpios = <&tca6416_u20 10 GPIO_ACTIVE_HIGH>;
+               label = "m2-b gnss";
+               radio-type = "gps";
+       };
+
+       rfkill-m2-b-wwan {
+               compatible = "rfkill-gpio";
+               /* rfkill-gpio inverts internally */
+               shutdown-gpios = <&tca6416_u20 9 GPIO_ACTIVE_HIGH>;
+               label = "m2-b radio";
+               radio-type = "wwan";
+       };
+};
+
+&ecspi2 {
+       cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+       num-cs = <1>;
+       pinctrl-0 = <&ecspi2_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+
+       ecspi2_muxed: spi@0 {
+               compatible = "spi-mux";
+               reg = <0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               mux-controls = <&spi_mux>;
+               /* mux bandwidth is 2GHz, soc max. spi clock is 166MHz */
+               spi-max-frequency = <166000000>;
+
+               tpm@0 {
+                       compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
+                       reg = <0>;
+                       interrupts-extended = <&tca6416_u21 9 IRQ_TYPE_LEVEL_LOW>;
+                       reset-gpios = <&tca6416_u21 1 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
+                       spi-max-frequency = <43000000>;
+               };
+       };
+};
+
+&flexcan1 {
+       pinctrl-0 = <&can1_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+
+       can-transceiver {
+               max-bitrate = <8000000>;
+       };
+};
+
+&flexcan2 {
+       pinctrl-0 = <&can2_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+
+       can-transceiver {
+               max-bitrate = <8000000>;
+       };
+};
+
+&i2c2 {
+       i2c-mux@70 {
+               compatible = "nxp,pca9546";
+               reg = <0x70>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               /*
+                * This reset is open drain,
+                * but reset core does not support GPIO_OPEN_DRAIN flag.
+                */
+               reset-gpios = <&tca6416_u21 2 GPIO_ACTIVE_LOW>;
+
+               /* channel 0 routed to expansion connector (J22) */
+               i2c_exp: i2c@0 {
+                       reg = <0>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               /* channel 1 routed to mipi-csi connector (J23) */
+               i2c_csi: i2c@1 {
+                       reg = <1>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               /* channel 2 routed to mipi-dsi connector (J25) */
+               i2c_dsi: i2c@2 {
+                       reg = <2>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       tca6408_u48: gpio@21 {
+                               compatible = "ti,tca6408";
+                               reg = <0x21>;
+                               #gpio-cells = <2>;
+                               gpio-controller;
+                               gpio-line-names = "CAM_RST#", "DSI_RESET",
+                                                 "DSI_STBYB", "DSI_PWM_BL",
+                                                 "DSI_L/R", "DSI_U/D",
+                                                 "DSI_CTP_/RST", "CAM_TRIG";
+                               /*
+                                * reset shared between U37 and U48, to be
+                                * supported once gpio-pca953x switches to
+                                * reset framework.
+                                *
+                                * reset-gpios = <&tca6416_u21 4
+                                *                (GPIO_ACTIVE_LOW|GPIO_PULL_UP|GPIO_OPEN_DRAIN)>;
+                                */
+                       };
+
+               };
+
+               /* channel 2 routed to lvds connector (J24) */
+               i2c_lvds: i2c@3 {
+                       reg = <3>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       tca6408_u37: gpio@20 {
+                               compatible = "ti,tca6408";
+                               reg = <0x20>;
+                               #gpio-cells = <2>;
+                               gpio-controller;
+                               gpio-line-names = "SELB", "LVDS_RESET",
+                                                 "LVDS_STBYB", "LVDS_PWM_BL",
+                                                 "LVDS_L/R", "LVDS_U/D",
+                                                 "LVDS_CTP_/RST", "";
+                               /*
+                                * reset shared between U37 and U48, to be
+                                * supported once gpio-pca953x switches to
+                                * reset framework.
+                                *
+                                * reset-gpios = <&tca6416_u21 4
+                                *                (GPIO_ACTIVE_LOW|GPIO_PULL_UP|GPIO_OPEN_DRAIN)>;
+                                */
+                       };
+
+               };
+       };
+};
+
+&i2c3 {
+       /* highest i2c clock supported by all peripherals is 400kHz */
+       clock-frequency = <400000>;
+
+       tca6416_u20: gpio@20 {
+               reg = <0x20>;
+               #gpio-cells = <2>;
+               gpio-controller;
+               gpio-line-names = "TCA_INT/EXT_UART", "TCA_UARTA_232/485",
+                                 "TCA_UARTB_232/485", "TCA_INT/EXT_CAN",
+                                 "TCA_NXP/REN", "TCA_M.2B_3V3_EN",
+                                 "TCA_M.2M_3V3_EN", "TCA_M.2M_RESET#",
+                                 "TCA_M.2B_RESET#", "TCA_M.2B_W_DIS#",
+                                 "TCA_M.2B_GPS_EN#", "TCA_USB-HUB_RST#",
+                                 "TCA_USB_HUB3_PWR_EN", "TCA_USB_HUB4_PWR_EN",
+                                 "TCA_USB1_PWR_EN", "TCA_VIDEO_PWR_EN";
+               /*
+                * This is a TI TCAL6416 using same programming model as
+                * NXP PCAL6416, not to be confused with TI TCA6416.
+                */
+               compatible = "nxp,pcal6416";
+
+               m2-b-reset-hog {
+                       gpios = <8 GPIO_ACTIVE_LOW>;
+                       gpio-hog;
+                       line-name = "m2-b-reset";
+                       output-low;
+               };
+       };
+
+       tca6416_u21: gpio@21 {
+               reg = <0x21>;
+               #interrupt-cells = <2>;
+               interrupt-controller;
+               #gpio-cells = <2>;
+               gpio-controller;
+               gpio-line-names = "TCA_SPI_TPM/EXT", "TCA_TPM_RST#",
+                                 "TCA_I2C_RST", "TCA_RS232_SHTD#",
+                                 "TCA_LCD_I2C_RST", "TCA_DIG_OUT1",
+                                 "TCA_bDIG_IN1", "TCA_SENS_INT",
+                                 "TCA_ALERT#", "TCA_TPM_PIRQ#",
+                                 "TCA_RTC_INT", "TCA_M.2M_WAKW_ON_LAN",
+                                 "TCA_M.2M_CLKREQ#", "TCA_LVDS_INT#",
+                                 "", "TCA_POE_AT";
+               interrupts-extended = <&gpio1 15 IRQ_TYPE_EDGE_FALLING>;
+               pinctrl-0 = <&tca6416_u21_int_pins>;
+               pinctrl-names = "default";
+               /*
+                * This is a TI TCAL6416 using same programming model as
+                * NXP PCAL6416, not to be confused with TI TCA6416.
+                */
+               compatible = "nxp,pcal6416";
+
+               lcd-i2c-reset-hog {
+                       gpios = <4 (GPIO_ACTIVE_LOW|GPIO_PULL_UP|GPIO_OPEN_DRAIN)>;
+                       line-name = "lcd-i2c-reset";
+                       output-low;
+                       /*
+                        * reset shared between U37 and U48, to be
+                        * supported once gpio-pca953x switches to
+                        * reset framework.
+                        */
+                       gpio-hog;
+               };
+
+               m2-m-clkreq-hog {
+                       gpios = <12 GPIO_ACTIVE_LOW>;
+                       gpio-hog;
+                       input;
+                       line-name = "m2-m-clkreq";
+               };
+
+               rs232_shutdown: rs232-shutdown-hog {
+                       gpios = <3 GPIO_ACTIVE_LOW>;
+                       gpio-hog;
+                       line-name = "rs232-shutdown";
+                       output-low;
+               };
+       };
+
+       led-controller@30 {
+               compatible = "ti,lp5562";
+               reg = <0x30>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               /* use internal clock, could use external generated by rtc */
+               clock-mode = /bits/ 8 <1>;
+
+               multi-led@0 {
+                       reg = <0x0>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       color = <LED_COLOR_ID_RGB>;
+                       label = "D7";
+
+                       led@0 {
+                               reg = <0x0>;
+                               color = <LED_COLOR_ID_RED>;
+                               led-cur = /bits/ 8 <0x32>;
+                               max-cur = /bits/ 8 <0x64>;
+                       };
+
+                       led@1 {
+                               reg = <0x1>;
+                               color = <LED_COLOR_ID_GREEN>;
+                               led-cur = /bits/ 8 <0x19>;
+                               max-cur = /bits/ 8 <0x32>;
+                       };
+
+                       led@2 {
+                               reg = <0x2>;
+                               color = <LED_COLOR_ID_BLUE>;
+                               led-cur = /bits/ 8 <0x19>;
+                               max-cur = /bits/ 8 <0x32>;
+                       };
+               };
+
+               led@3 {
+                       reg = <0x3>;
+                       chan-name = "D8";
+                       color = <LED_COLOR_ID_GREEN>;
+                       label = "D8";
+                       led-cur = /bits/ 8 <0x19>;
+                       max-cur = /bits/ 8 <0x64>;
+               };
+       };
+
+       light-sensor@44 {
+               compatible = "isil,isl29023";
+               reg = <0x44>;
+               /* IRQ shared between accelerometer, light-sensor and Tamper input (J5007) */
+               interrupts-extended = <&tca6416_u21 7 IRQ_TYPE_EDGE_FALLING>;
+       };
+
+       accelerometer@53 {
+               compatible = "adi,adxl345";
+               reg = <0x53>;
+               /* IRQ shared between accelerometer, light-sensor and Tamper input (J5007) */
+               interrupts-extended = <&tca6416_u21 7 IRQ_TYPE_EDGE_FALLING>;
+               interrupt-names = "INT1";
+       };
+
+       carrier_eeprom: eeprom@57 {
+               compatible = "atmel,24c02";
+               reg = <0x57>;
+               pagesize = <8>;
+       };
+
+       carrier_rtc: rtc@69 {
+               compatible = "abracon,ab1805";
+               reg = <0x69>;
+               abracon,tc-diode = "schottky";
+               abracon,tc-resistor = <3>;
+               /*
+                * AM1805 RTC used on this board has only nTIRQ pins wired,
+                * which is for countdown timer irqs only.
+                * Driver does not support this, disable for now.
+                *
+                * interrupts-extended = <&tca6416_u21 10 IRQ_TYPE_EDGE_FALLING>;
+                */
+       };
+};
+
+&iomuxc {
+       can1_pins: pinctrl-can1-grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SPDIF_RX__CAN1_RX                  0x154
+                       MX8MP_IOMUXC_SPDIF_TX__CAN1_TX                  0x154
+               >;
+       };
+
+       can2_pins: pinctrl-can2-grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SAI5_MCLK__CAN2_RX                 0x154
+                       MX8MP_IOMUXC_SAI5_RXD3__CAN2_TX                 0x154
+               >;
+       };
+
+       ecspi2_pins: pinctrl-ecspi2-grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK           0x140
+                       MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI           0x140
+                       MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO           0x140
+                       MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13             0x140
+               >;
+       };
+
+       tca6416_u21_int_pins: pinctrl-tca6416-u21-int-grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15             0x0
+               >;
+       };
+
+       /* UARTA */
+       uart3_pins: pinctrl-uart3-grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX          0x140
+                       MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX          0x140
+                       MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09             0x140
+               >;
+       };
+
+       /* UARTB */
+       uart4_pins: pinctrl-uart4-grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX            0x140
+                       MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX            0x140
+                       MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08            0x140
+               >;
+       };
+
+       usdhc2_100mhz_pins: pinctrl-usdhc2-100mhz-grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK                0x194
+                       MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD                0x1d4
+                       MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0            0x1d4
+                       MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1            0x1d4
+                       MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2            0x1d4
+                       MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3            0x1d4
+                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT         0x140
+                       MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B              0x140
+               >;
+       };
+
+       usdhc2_200mhz_pins: pinctrl-usdhc2-200mhz-grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK                0x196
+                       MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD                0x1d6
+                       MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0            0x1d6
+                       MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1            0x1d6
+                       MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2            0x1d6
+                       MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3            0x1d6
+                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT         0x140
+                       MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B              0x140
+               >;
+       };
+
+       usdhc2_pins: pinctrl-usdhc2-grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK                0x190
+                       MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD                0x1d0
+                       MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0            0x1d0
+                       MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1            0x1d0
+                       MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2            0x1d0
+                       MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3            0x1d0
+                       MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT         0x140
+                       MX8MP_IOMUXC_SD2_CD_B__USDHC2_CD_B              0x140
+               >;
+       };
+
+       vmmc_pins: pinctrl-vmmc-grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19            0x0
+               >;
+       };
+};
+
+&pcie {
+       reset-gpio = <&tca6416_u20 7 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+/* M.2 M-Key (J4) */
+&pcie_phy {
+       clocks = <&hsio_blk_ctrl>;
+       clock-names = "ref";
+       fsl,clkreq-unsupported;
+       fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
+       status = "okay";
+};
+
+&phy0 {
+       leds {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               /* ADIN1300 LED_0 pin */
+               led@0 {
+                       reg = <0>;
+                       color = <LED_COLOR_ID_GREEN>;
+                       default-state = "keep";
+                       function = LED_FUNCTION_LAN;
+               };
+       };
+};
+
+&phy1 {
+       leds {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               /* ADIN1300 LED_0 pin */
+               led@0 {
+                       reg = <0>;
+                       color = <LED_COLOR_ID_GREEN>;
+                       default-state = "keep";
+                       function = LED_FUNCTION_LAN;
+               };
+       };
+};
+
+&uart3 {
+       assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
+       /* select 80MHz parent clock to support maximum baudrate 4Mbps */
+       assigned-clocks = <&clk IMX8MP_CLK_UART3>;
+       pinctrl-0 = <&uart3_pins>;
+       pinctrl-names = "default";
+       rts-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+};
+
+&uart4 {
+       assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
+       /* select 80MHz parent clock to support maximum baudrate 4Mbps */
+       assigned-clocks = <&clk IMX8MP_CLK_UART4>;
+       pinctrl-0 = <&uart4_pins>;
+       pinctrl-names = "default";
+       rts-gpios = <&gpio5 8 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb3_1 {
+       status = "okay";
+};
+
+&usb3_phy0 {
+       vbus-supply = <&vbus1>;
+       fsl,phy-tx-preemp-amp-tune-microamp = <1200>;
+       status = "okay";
+};
+
+&usb3_phy1 {
+       status = "okay";
+};
+
+&usb_dwc3_0 {
+       dr_mode = "host";
+};
+
+&usb_dwc3_1 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+       dr_mode = "host";
+
+       hub_2_0: hub@1 {
+               compatible = "usb4b4,6502", "usb4b4,6506";
+               reg = <1>;
+               peer-hub = <&hub_3_0>;
+               reset-gpios = <&tca6416_u20 11 GPIO_ACTIVE_LOW>;
+               vdd2-supply = <&v_3_3>;
+               vdd-supply = <&v_1_2>;
+       };
+
+       hub_3_0: hub@2 {
+               compatible = "usb4b4,6500", "usb4b4,6504";
+               reg = <2>;
+               peer-hub = <&hub_2_0>;
+               reset-gpios = <&tca6416_u20 11 GPIO_ACTIVE_LOW>;
+               vdd2-supply = <&v_3_3>;
+               vdd-supply = <&v_1_2>;
+       };
+};
+
+&usdhc2 {
+       bus-width = <4>;
+       cap-power-off-card;
+       full-pwr-cycle;
+       pinctrl-0 = <&usdhc2_pins>;
+       pinctrl-1 = <&usdhc2_100mhz_pins>;
+       pinctrl-2 = <&usdhc2_200mhz_pins>;
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       vmmc-supply = <&vmmc>;
+       status = "okay";
+};