wifi: rtw89: 8922a: add digital compensation for 2GHz

This fixes transmit power too low under 2GHz connection. Previously
we missed the settings of 2GHz, add the according calibrated tables.

Signed-off-by: Po-Hao Huang <phhuang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20260117044157.2392958-10-pkshih@realtek.com

diff --git a/drivers/net/wireless/realtek/rtw89/rtw8922a.c b/drivers/net/wireless/realtek/rtw89/rtw8922a.c
index 0a3c2207dd4b0eb555b285e2e32f31b5be6abce1..f41b66b362c4e61ac5cf1a3b1e95eaf3ae8ca0bb 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/rtw8922a.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8922a.c
@@ -1768,6 +1768,32 @@ static int rtw8922a_ctrl_rx_path_tmac(struct rtw89_dev *rtwdev,
 }
 
 #define DIGITAL_PWR_COMP_REG_NUM 22
+static const u32 rtw8922a_digital_pwr_comp_2g_s0_val[][DIGITAL_PWR_COMP_REG_NUM] = {
+       {0x012C0064, 0x04B00258, 0x00432710, 0x019000A7, 0x06400320,
+        0x0D05091D, 0x14D50FA0, 0x00000000, 0x01010000, 0x00000101,
+        0x01010101, 0x02020201, 0x02010000, 0x03030202, 0x00000303,
+        0x03020101, 0x06060504, 0x01010000, 0x06050403, 0x01000606,
+        0x05040202, 0x07070706},
+       {0x012C0064, 0x04B00258, 0x00432710, 0x019000A7, 0x06400320,
+        0x0D05091D, 0x14D50FA0, 0x00000000, 0x01010100, 0x00000101,
+        0x01000000, 0x01010101, 0x01010000, 0x02020202, 0x00000404,
+        0x03020101, 0x04040303, 0x02010000, 0x03030303, 0x00000505,
+        0x03030201, 0x05050303},
+};
+
+static const u32 rtw8922a_digital_pwr_comp_2g_s1_val[][DIGITAL_PWR_COMP_REG_NUM] = {
+       {0x012C0064, 0x04B00258, 0x00432710, 0x019000A7, 0x06400320,
+        0x0D05091D, 0x14D50FA0, 0x01010000, 0x01010101, 0x00000101,
+        0x01010100, 0x01010101, 0x01010000, 0x02020202, 0x01000202,
+        0x02020101, 0x03030202, 0x02010000, 0x05040403, 0x01000606,
+        0x05040302, 0x07070605},
+       {0x012C0064, 0x04B00258, 0x00432710, 0x019000A7, 0x06400320,
+        0x0D05091D, 0x14D50FA0, 0x00000000, 0x01010100, 0x00000101,
+        0x01010000, 0x02020201, 0x02010100, 0x03030202, 0x01000404,
+        0x04030201, 0x05050404, 0x01010100, 0x04030303, 0x01000505,
+        0x03030101, 0x05050404},
+};
+
 static const u32 rtw8922a_digital_pwr_comp_val[][DIGITAL_PWR_COMP_REG_NUM] = {
        {0x012C0096, 0x044C02BC, 0x00322710, 0x015E0096, 0x03C8028A,
         0x0BB80708, 0x17701194, 0x02020100, 0x03030303, 0x01000303,
@@ -1782,7 +1808,7 @@ static const u32 rtw8922a_digital_pwr_comp_val[][DIGITAL_PWR_COMP_REG_NUM] = {
 };
 
 static void rtw8922a_set_digital_pwr_comp(struct rtw89_dev *rtwdev,
-                                         bool enable, u8 nss,
+                                         u8 band, u8 nss,
                                          enum rtw89_rf_path path)
 {
        static const u32 ltpc_t0[2] = {R_BE_LTPC_T0_PATH0, R_BE_LTPC_T0_PATH1};
@@ -1790,14 +1816,25 @@ static void rtw8922a_set_digital_pwr_comp(struct rtw89_dev *rtwdev,
        u32 addr, val;
        u32 i;
 
-       if (nss == 1)
-               digital_pwr_comp = rtw8922a_digital_pwr_comp_val[0];
-       else
-               digital_pwr_comp = rtw8922a_digital_pwr_comp_val[1];
+       if (nss == 1) {
+               if (band == RTW89_BAND_2G)
+                       digital_pwr_comp = path == RF_PATH_A ?
+                               rtw8922a_digital_pwr_comp_2g_s0_val[0] :
+                               rtw8922a_digital_pwr_comp_2g_s1_val[0];
+               else
+                       digital_pwr_comp = rtw8922a_digital_pwr_comp_val[0];
+       } else {
+               if (band == RTW89_BAND_2G)
+                       digital_pwr_comp = path == RF_PATH_A ?
+                               rtw8922a_digital_pwr_comp_2g_s0_val[1] :
+                               rtw8922a_digital_pwr_comp_2g_s1_val[1];
+               else
+                       digital_pwr_comp = rtw8922a_digital_pwr_comp_val[1];
+       }
 
        addr = ltpc_t0[path];
        for (i = 0; i < DIGITAL_PWR_COMP_REG_NUM; i++, addr += 4) {
-               val = enable ? digital_pwr_comp[i] : 0;
+               val = digital_pwr_comp[i];
                rtw89_phy_write32(rtwdev, addr, val);
        }
 }
@@ -1806,7 +1843,7 @@ static void rtw8922a_digital_pwr_comp(struct rtw89_dev *rtwdev,
                                      enum rtw89_phy_idx phy_idx)
 {
        const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_CHANCTX_0);
-       bool enable = chan->band_type != RTW89_BAND_2G;
+       u8 band = chan->band_type;
        u8 path;
 
        if (rtwdev->mlo_dbcc_mode == MLO_1_PLUS_1_1RF) {
@@ -1814,10 +1851,10 @@ static void rtw8922a_digital_pwr_comp(struct rtw89_dev *rtwdev,
                        path = RF_PATH_A;
                else
                        path = RF_PATH_B;
-               rtw8922a_set_digital_pwr_comp(rtwdev, enable, 1, path);
+               rtw8922a_set_digital_pwr_comp(rtwdev, band, 1, path);
        } else {
-               rtw8922a_set_digital_pwr_comp(rtwdev, enable, 2, RF_PATH_A);
-               rtw8922a_set_digital_pwr_comp(rtwdev, enable, 2, RF_PATH_B);
+               rtw8922a_set_digital_pwr_comp(rtwdev, band, 2, RF_PATH_A);
+               rtw8922a_set_digital_pwr_comp(rtwdev, band, 2, RF_PATH_B);
        }
 }