VexArch guest_arch,
VexArchInfo* archinfo,
VexAbiInfo* abiinfo,
- Bool host_bigendian );
+ Bool host_bigendian,
+ Bool sigill_diag );
/* Used by the optimiser to specialise calls to helpers. */
extern
void* callback_opaque,
Long delta64,
VexArchInfo* archinfo,
- VexAbiInfo* vbi
+ VexAbiInfo* vbi,
+ Bool sigill_diag
)
{
IRTemp t1, t2, t3, t4, t5, t6;
//default:
decode_failure:
/* All decode failures end up here. */
- vex_printf("vex amd64->IR: unhandled instruction bytes: "
- "0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
- (Int)getUChar(delta_start+0),
- (Int)getUChar(delta_start+1),
- (Int)getUChar(delta_start+2),
- (Int)getUChar(delta_start+3),
- (Int)getUChar(delta_start+4),
- (Int)getUChar(delta_start+5),
- (Int)getUChar(delta_start+6),
- (Int)getUChar(delta_start+7) );
- vex_printf("vex amd64->IR: REX=%d REX.W=%d REX.R=%d REX.X=%d REX.B=%d\n",
- haveREX(pfx) ? 1 : 0, getRexW(pfx), getRexR(pfx),
- getRexX(pfx), getRexB(pfx));
- vex_printf("vex amd64->IR: VEX=%d VEX.L=%d VEX.nVVVV=0x%x ESC=%s\n",
- haveVEX(pfx) ? 1 : 0, getVexL(pfx),
- getVexNvvvv(pfx),
- esc==ESC_NONE ? "NONE" :
- esc==ESC_0F ? "0F" :
- esc==ESC_0F38 ? "0F38" :
- esc==ESC_0F3A ? "0F3A" : "???");
- vex_printf("vex amd64->IR: PFX.66=%d PFX.F2=%d PFX.F3=%d\n",
- have66(pfx) ? 1 : 0, haveF2(pfx) ? 1 : 0,
- haveF3(pfx) ? 1 : 0);
+ if (sigill_diag) {
+ vex_printf("vex amd64->IR: unhandled instruction bytes: "
+ "0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
+ (Int)getUChar(delta_start+0),
+ (Int)getUChar(delta_start+1),
+ (Int)getUChar(delta_start+2),
+ (Int)getUChar(delta_start+3),
+ (Int)getUChar(delta_start+4),
+ (Int)getUChar(delta_start+5),
+ (Int)getUChar(delta_start+6),
+ (Int)getUChar(delta_start+7) );
+ vex_printf("vex amd64->IR: REX=%d REX.W=%d REX.R=%d REX.X=%d REX.B=%d\n",
+ haveREX(pfx) ? 1 : 0, getRexW(pfx), getRexR(pfx),
+ getRexX(pfx), getRexB(pfx));
+ vex_printf("vex amd64->IR: VEX=%d VEX.L=%d VEX.nVVVV=0x%x ESC=%s\n",
+ haveVEX(pfx) ? 1 : 0, getVexL(pfx),
+ getVexNvvvv(pfx),
+ esc==ESC_NONE ? "NONE" :
+ esc==ESC_0F ? "0F" :
+ esc==ESC_0F38 ? "0F38" :
+ esc==ESC_0F3A ? "0F3A" : "???");
+ vex_printf("vex amd64->IR: PFX.66=%d PFX.F2=%d PFX.F3=%d\n",
+ have66(pfx) ? 1 : 0, haveF2(pfx) ? 1 : 0,
+ haveF3(pfx) ? 1 : 0);
+ }
/* Tell the dispatcher that this insn cannot be decoded, and so has
not been executed, and (is currently) the next to be executed.
VexArch guest_arch,
VexArchInfo* archinfo,
VexAbiInfo* abiinfo,
- Bool host_bigendian_IN )
+ Bool host_bigendian_IN,
+ Bool sigill_diag_IN )
{
Int i, x1, x2;
Bool expect_CAS, has_CAS;
dres = disInstr_AMD64_WRK ( &expect_CAS, resteerOkFn,
resteerCisOk,
callback_opaque,
- delta, archinfo, abiinfo );
+ delta, archinfo, abiinfo, sigill_diag_IN );
x2 = irsb_IN->stmts_used;
vassert(x2 >= x1);
dres = disInstr_AMD64_WRK ( &expect_CAS, resteerOkFn,
resteerCisOk,
callback_opaque,
- delta, archinfo, abiinfo );
+ delta, archinfo, abiinfo, sigill_diag_IN );
for (i = x1; i < x2; i++) {
vex_printf("\t\t");
ppIRStmt(irsb_IN->stmts[i]);
VexArch guest_arch,
VexArchInfo* archinfo,
VexAbiInfo* abiinfo,
- Bool host_bigendian );
+ Bool host_bigendian,
+ Bool sigill_diag );
/* Used by the optimiser to specialise calls to helpers. */
extern
void* callback_opaque,
UChar* guest_instr,
VexArchInfo* archinfo,
- VexAbiInfo* abiinfo
+ VexAbiInfo* abiinfo,
+ Bool sigill_diag
)
{
// A macro to fish bits out of 'insn'.
decode_failure:
/* All decode failures end up here. */
- vex_printf("disInstr(arm): unhandled instruction: "
- "0x%x\n", insn);
- vex_printf(" cond=%d(0x%x) 27:20=%u(0x%02x) "
- "4:4=%d "
- "3:0=%u(0x%x)\n",
- (Int)INSN_COND, (UInt)INSN_COND,
- (Int)INSN(27,20), (UInt)INSN(27,20),
- (Int)INSN(4,4),
- (Int)INSN(3,0), (UInt)INSN(3,0) );
+ if (sigill_diag) {
+ vex_printf("disInstr(arm): unhandled instruction: "
+ "0x%x\n", insn);
+ vex_printf(" cond=%d(0x%x) 27:20=%u(0x%02x) "
+ "4:4=%d "
+ "3:0=%u(0x%x)\n",
+ (Int)INSN_COND, (UInt)INSN_COND,
+ (Int)INSN(27,20), (UInt)INSN(27,20),
+ (Int)INSN(4,4),
+ (Int)INSN(3,0), (UInt)INSN(3,0) );
+ }
/* Tell the dispatcher that this insn cannot be decoded, and so has
not been executed, and (is currently) the next to be executed.
void* callback_opaque,
UChar* guest_instr,
VexArchInfo* archinfo,
- VexAbiInfo* abiinfo
+ VexAbiInfo* abiinfo,
+ Bool sigill_diag
)
{
/* A macro to fish bits out of insn0. There's also INSN1, to fish
decode_failure:
/* All decode failures end up here. */
- vex_printf("disInstr(thumb): unhandled instruction: "
- "0x%04x 0x%04x\n", (UInt)insn0, (UInt)insn1);
+ if (sigill_diag)
+ vex_printf("disInstr(thumb): unhandled instruction: "
+ "0x%04x 0x%04x\n", (UInt)insn0, (UInt)insn1);
/* Back up ITSTATE to the initial value for this instruction.
If we don't do that, any subsequent restart of the instruction
VexArch guest_arch,
VexArchInfo* archinfo,
VexAbiInfo* abiinfo,
- Bool host_bigendian_IN )
+ Bool host_bigendian_IN,
+ Bool sigill_diag_IN )
{
DisResult dres;
Bool isThumb = (Bool)(guest_IP_ENCODED & 1);
dres = disInstr_THUMB_WRK ( resteerOkFn,
resteerCisOk, callback_opaque,
&guest_code_IN[delta_ENCODED - 1],
- archinfo, abiinfo );
+ archinfo, abiinfo, sigill_diag_IN );
} else {
dres = disInstr_ARM_WRK ( resteerOkFn,
resteerCisOk, callback_opaque,
&guest_code_IN[delta_ENCODED],
- archinfo, abiinfo );
+ archinfo, abiinfo, sigill_diag_IN );
}
return dres;
/*IN*/ Addr64 guest_IP_bbstart,
/*IN*/ Bool (*chase_into_ok)(void*,Addr64),
/*IN*/ Bool host_bigendian,
+ /*IN*/ Bool sigill_diag,
/*IN*/ VexArch arch_guest,
/*IN*/ VexArchInfo* archinfo_guest,
/*IN*/ VexAbiInfo* abiinfo_both,
arch_guest,
archinfo_guest,
abiinfo_both,
- host_bigendian );
+ host_bigendian,
+ sigill_diag );
/* stay sane ... */
vassert(dres.whatNext == Dis_StopHere
/*IN*/ VexAbiInfo* abiinfo,
/* Is the host bigendian? */
- /*IN*/ Bool host_bigendian
+ /*IN*/ Bool host_bigendian,
+
+ /* Should diagnostics be printed for illegal instructions? */
+ /*IN*/ Bool sigill_diag
);
/*IN*/ Addr64 guest_IP_bbstart,
/*IN*/ Bool (*chase_into_ok)(void*,Addr64),
/*IN*/ Bool host_bigendian,
+ /*IN*/ Bool sigill_diag,
/*IN*/ VexArch arch_guest,
/*IN*/ VexArchInfo* archinfo_guest,
/*IN*/ VexAbiInfo* abiinfo_both,
VexArch guest_arch,
VexArchInfo* archinfo,
VexAbiInfo* abiinfo,
- Bool host_bigendian );
+ Bool host_bigendian,
+ Bool sigill_diag );
/* Used by the optimiser to specialise calls to helpers. */
extern IRExpr *guest_mips32_spechelper(const HChar * function_name, IRExpr ** args,
void* callback_opaque,
Long delta64,
VexArchInfo* archinfo,
- VexAbiInfo* abiinfo )
+ VexAbiInfo* abiinfo,
+ Bool sigill_diag )
{
IRTemp t0, t1, t2, t3, t4, t5, t6, t7, t8;
UInt opcode, cins, rs, rt, rd, sa, ft, fs, fd, fmt, tf, nd, function,
decode_failure:
/* All decode failures end up here. */
- DIP("vex mips->IR: unhandled instruction bytes: "
- "0x%x 0x%x 0x%x 0x%x\n",
- (Int) getIByte(delta_start + 0),
- (Int) getIByte(delta_start + 1),
- (Int) getIByte(delta_start + 2),
- (Int) getIByte(delta_start + 3));
+ if (sigill_diag)
+ vex_printf("vex mips->IR: unhandled instruction bytes: "
+ "0x%x 0x%x 0x%x 0x%x\n",
+ (Int) getIByte(delta_start + 0),
+ (Int) getIByte(delta_start + 1),
+ (Int) getIByte(delta_start + 2),
+ (Int) getIByte(delta_start + 3));
/* Tell the dispatcher that this insn cannot be decoded, and so has
not been executed, and (is currently) the next to be executed.
VexArch guest_arch,
VexArchInfo* archinfo,
VexAbiInfo* abiinfo,
- Bool host_bigendian_IN)
+ Bool host_bigendian_IN,
+ Bool sigill_diag_IN)
{
DisResult dres;
guest_PC_bbstart = (Addr32) toUInt(guest_IP - delta);
dres = disInstr_MIPS_WRK(resteerOkFn, resteerCisOk, callback_opaque,
- delta, archinfo, abiinfo);
+ delta, archinfo, abiinfo, sigill_diag_IN);
return dres;
}
VexArch guest_arch,
VexArchInfo* archinfo,
VexAbiInfo* abiinfo,
- Bool host_bigendian );
+ Bool host_bigendian,
+ Bool sigill_diag );
/* Used by the optimiser to specialise calls to helpers. */
extern
void* callback_opaque,
Long delta64,
VexArchInfo* archinfo,
- VexAbiInfo* abiinfo
+ VexAbiInfo* abiinfo,
+ Bool sigill_diag
)
{
UChar opc1;
decode_failure:
/* All decode failures end up here. */
opc2 = (theInstr) & 0x7FF;
- vex_printf("disInstr(ppc): unhandled instruction: "
- "0x%x\n", theInstr);
- vex_printf(" primary %d(0x%x), secondary %u(0x%x)\n",
- opc1, opc1, opc2, opc2);
+ if (sigill_diag) {
+ vex_printf("disInstr(ppc): unhandled instruction: "
+ "0x%x\n", theInstr);
+ vex_printf(" primary %d(0x%x), secondary %u(0x%x)\n",
+ opc1, opc1, opc2, opc2);
+ }
/* Tell the dispatcher that this insn cannot be decoded, and so has
not been executed, and (is currently) the next to be executed.
VexArch guest_arch,
VexArchInfo* archinfo,
VexAbiInfo* abiinfo,
- Bool host_bigendian_IN )
+ Bool host_bigendian_IN,
+ Bool sigill_diag_IN )
{
IRType ty;
DisResult dres;
guest_CIA_bbstart = mkSzAddr(ty, guest_IP - delta);
dres = disInstr_PPC_WRK ( resteerOkFn, resteerCisOk, callback_opaque,
- delta, archinfo, abiinfo );
+ delta, archinfo, abiinfo, sigill_diag_IN );
return dres;
}
VexArch guest_arch,
VexArchInfo* archinfo,
VexAbiInfo* abiinfo,
- Bool host_bigendian );
+ Bool host_bigendian,
+ Bool sigill_diag );
/* Used by the optimiser to specialise calls to helpers. */
IRExpr* guest_s390x_spechelper ( const HChar *function_name,
static Bool (*resteer_fn)(void *, Addr64);
static void *resteer_data;
+/* Whether to print diagnostics for illegal instructions. */
+static Bool sigill_diag;
+
/* The last seen execute target instruction */
ULong last_execute_target;
if (status == S390_DECODE_OK) return insn_length; /* OK */
/* Decoding failed somehow */
- vex_printf("vex s390->IR: ");
- switch (status) {
- case S390_DECODE_UNKNOWN_INSN:
- vex_printf("unknown insn: ");
- break;
+ if (sigill_diag) {
+ vex_printf("vex s390->IR: ");
+ switch (status) {
+ case S390_DECODE_UNKNOWN_INSN:
+ vex_printf("unknown insn: ");
+ break;
- case S390_DECODE_UNIMPLEMENTED_INSN:
- vex_printf("unimplemented insn: ");
- break;
+ case S390_DECODE_UNIMPLEMENTED_INSN:
+ vex_printf("unimplemented insn: ");
+ break;
- case S390_DECODE_UNKNOWN_SPECIAL_INSN:
- vex_printf("unimplemented special insn: ");
- break;
+ case S390_DECODE_UNKNOWN_SPECIAL_INSN:
+ vex_printf("unimplemented special insn: ");
+ break;
- default:
- case S390_DECODE_ERROR:
- vex_printf("decoding error: ");
- break;
- }
+ default:
+ case S390_DECODE_ERROR:
+ vex_printf("decoding error: ");
+ break;
+ }
- vex_printf("%02x%02x", bytes[0], bytes[1]);
- if (insn_length > 2) {
- vex_printf(" %02x%02x", bytes[2], bytes[3]);
- }
- if (insn_length > 4) {
- vex_printf(" %02x%02x", bytes[4], bytes[5]);
+ vex_printf("%02x%02x", bytes[0], bytes[1]);
+ if (insn_length > 2) {
+ vex_printf(" %02x%02x", bytes[2], bytes[3]);
+ }
+ if (insn_length > 4) {
+ vex_printf(" %02x%02x", bytes[4], bytes[5]);
+ }
+ vex_printf("\n");
}
- vex_printf("\n");
return 0; /* Failed */
}
VexArch guest_arch,
VexArchInfo *archinfo,
VexAbiInfo *abiinfo,
- Bool host_bigendian)
+ Bool host_bigendian,
+ Bool sigill_diag_IN)
{
vassert(guest_arch == VexArchS390X);
irsb = irsb_IN;
resteer_fn = resteerOkFn;
resteer_data = callback_opaque;
+ sigill_diag = sigill_diag_IN;
return disInstr_S390_WRK(guest_code + delta);
}
VexArch guest_arch,
VexArchInfo* archinfo,
VexAbiInfo* abiinfo,
- Bool host_bigendian );
+ Bool host_bigendian,
+ Bool sigill_diag );
/* Used by the optimiser to specialise calls to helpers. */
extern
void* callback_opaque,
Long delta64,
VexArchInfo* archinfo,
- VexAbiInfo* vbi
+ VexAbiInfo* vbi,
+ Bool sigill_diag
)
{
IRType ty;
default:
decode_failure:
/* All decode failures end up here. */
- vex_printf("vex x86->IR: unhandled instruction bytes: "
- "0x%x 0x%x 0x%x 0x%x\n",
- (Int)getIByte(delta_start+0),
- (Int)getIByte(delta_start+1),
- (Int)getIByte(delta_start+2),
- (Int)getIByte(delta_start+3) );
+ if (sigill_diag) {
+ vex_printf("vex x86->IR: unhandled instruction bytes: "
+ "0x%x 0x%x 0x%x 0x%x\n",
+ (Int)getIByte(delta_start+0),
+ (Int)getIByte(delta_start+1),
+ (Int)getIByte(delta_start+2),
+ (Int)getIByte(delta_start+3) );
+ }
/* Tell the dispatcher that this insn cannot be decoded, and so has
not been executed, and (is currently) the next to be executed.
VexArch guest_arch,
VexArchInfo* archinfo,
VexAbiInfo* abiinfo,
- Bool host_bigendian_IN )
+ Bool host_bigendian_IN,
+ Bool sigill_diag_IN )
{
Int i, x1, x2;
Bool expect_CAS, has_CAS;
dres = disInstr_X86_WRK ( &expect_CAS, resteerOkFn,
resteerCisOk,
callback_opaque,
- delta, archinfo, abiinfo );
+ delta, archinfo, abiinfo, sigill_diag_IN );
x2 = irsb_IN->stmts_used;
vassert(x2 >= x1);
dres = disInstr_X86_WRK ( &expect_CAS, resteerOkFn,
resteerCisOk,
callback_opaque,
- delta, archinfo, abiinfo );
+ delta, archinfo, abiinfo, sigill_diag_IN );
for (i = x1; i < x2; i++) {
vex_printf("\t\t");
ppIRStmt(irsb_IN->stmts[i]);
vta->guest_bytes_addr,
vta->chase_into_ok,
host_is_bigendian,
+ vta->sigill_diag,
vta->arch_guest,
&vta->archinfo_guest,
&vta->abiinfo_both,
/* IN: debug: trace vex activity at various points */
Int traceflags;
+ /* IN: debug: print diagnostics when an illegal instr is detected */
+ Bool sigill_diag;
+
/* IN: profiling: add a 64 bit profiler counter increment to the
translation? */
Bool addProfInc;
projects / thirdparty / valgrind.git / commitdiff
