SerialState state[PCI_SERIAL_MAX_PORTS];
uint32_t level[PCI_SERIAL_MAX_PORTS];
qemu_irq *irqs;
- uint8_t prog_if;
bool disable;
} PCIDivaSerialState;
size_t i, offset = 0;
size_t portmask = di.omask;
- pci->dev.config[PCI_CLASS_PROG] = pci->prog_if;
- pci->dev.config[PCI_INTERRUPT_PIN] = 0x01;
+ pci->dev.config[PCI_CLASS_PROG] = 2; /* 16550 compatible */
+ pci->dev.config[PCI_INTERRUPT_PIN] = 1;
memory_region_init(&pci->membar, OBJECT(pci), "serial_ports", 4096);
pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &pci->membar);
pci->irqs = qemu_allocate_irqs(multi_serial_irq_mux, pci, di.nports);
DEFINE_PROP_CHR("chardev2", PCIDivaSerialState, state[1].chr),
DEFINE_PROP_CHR("chardev3", PCIDivaSerialState, state[2].chr),
DEFINE_PROP_CHR("chardev4", PCIDivaSerialState, state[3].chr),
- DEFINE_PROP_UINT8("prog_if", PCIDivaSerialState, prog_if, 0x02),
DEFINE_PROP_UINT32("subvendor", PCIDivaSerialState, subvendor,
PCI_DEVICE_ID_HP_DIVA_TOSCA1),
};
SerialState state[PCI_SERIAL_MAX_PORTS];
uint32_t level[PCI_SERIAL_MAX_PORTS];
IRQState irqs[PCI_SERIAL_MAX_PORTS];
- uint8_t prog_if;
} PCIMultiSerialState;
static void multi_serial_pci_exit(PCIDevice *dev)
SerialState *s;
size_t i, nports = multi_serial_get_port_count(pc);
- pci->dev.config[PCI_CLASS_PROG] = pci->prog_if;
- pci->dev.config[PCI_INTERRUPT_PIN] = 0x01;
+ pci->dev.config[PCI_CLASS_PROG] = 2; /* 16550 compatible */
+ pci->dev.config[PCI_INTERRUPT_PIN] = 1;
memory_region_init(&pci->iobar, OBJECT(pci), "multiserial", 8 * nports);
pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->iobar);
static const Property multi_2x_serial_pci_properties[] = {
DEFINE_PROP_CHR("chardev1", PCIMultiSerialState, state[0].chr),
DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr),
- DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState, prog_if, 0x02),
};
static const Property multi_4x_serial_pci_properties[] = {
DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr),
DEFINE_PROP_CHR("chardev3", PCIMultiSerialState, state[2].chr),
DEFINE_PROP_CHR("chardev4", PCIMultiSerialState, state[3].chr),
- DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState, prog_if, 0x02),
};
static void multi_2x_serial_pci_class_initfn(ObjectClass *klass,
struct PCISerialState {
PCIDevice dev;
SerialState state;
- uint8_t prog_if;
};
#define TYPE_PCI_SERIAL "pci-serial"
return;
}
- pci->dev.config[PCI_CLASS_PROG] = pci->prog_if;
- pci->dev.config[PCI_INTERRUPT_PIN] = 0x01;
+ pci->dev.config[PCI_CLASS_PROG] = 2; /* 16550 compatible */
+ pci->dev.config[PCI_INTERRUPT_PIN] = 1;
s->irq = pci_allocate_irq(&pci->dev);
memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s, "serial", 8);
}
};
-static const Property serial_pci_properties[] = {
- DEFINE_PROP_UINT8("prog_if", PCISerialState, prog_if, 0x02),
-};
-
static void serial_pci_class_initfn(ObjectClass *klass, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
pc->revision = 1;
pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL;
dc->vmsd = &vmstate_pci_serial;
- device_class_set_props(dc, serial_pci_properties);
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
}