drm/amd/display: Read LTTPR ALPM caps during link cap retrieval

[ Upstream commit de84d580126eb2214937df755cfec5ef0901479e ]

[Why]
The latest DP spec requires the DP TX to read DPCD F0000h through F0009h
when detecting LTTPR capabilities for the first time.

[How]
Update LTTPR cap retrieval to read up to F0009h (two more bytes than the
previous F0007h), and store the LTTPR ALPM capabilities.

Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
index cc005da75ce4ce6333df619bbd60eceddee1bbb0..8bb628ab78554e55013e16c438ce65a8991d20f0 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
@@ -959,6 +959,14 @@ union dp_128b_132b_supported_lttpr_link_rates {
        uint8_t raw;
 };
 
+union dp_alpm_lttpr_cap {
+       struct {
+               uint8_t AUX_LESS_ALPM_SUPPORTED :1;
+               uint8_t RESERVED                                :7;
+       } bits;
+       uint8_t raw;
+};
+
 union dp_sink_video_fallback_formats {
        struct {
                uint8_t dp_1024x768_60Hz_24bpp_support  :1;
@@ -1118,6 +1126,7 @@ struct dc_lttpr_caps {
        uint8_t max_ext_timeout;
        union dp_main_link_channel_coding_lttpr_cap main_link_channel_coding;
        union dp_128b_132b_supported_lttpr_link_rates supported_128b_132b_rates;
+       union dp_alpm_lttpr_cap alpm;
        uint8_t aux_rd_interval[MAX_REPEATER_CNT - 1];
        uint8_t lttpr_ieee_oui[3];
        uint8_t lttpr_device_id[6];
@@ -1372,6 +1381,9 @@ struct dp_trace {
 #ifndef DPCD_MAX_UNCOMPRESSED_PIXEL_RATE_CAP
 #define DPCD_MAX_UNCOMPRESSED_PIXEL_RATE_CAP    0x221c
 #endif
+#ifndef DP_LTTPR_ALPM_CAPABILITIES
+#define DP_LTTPR_ALPM_CAPABILITIES              0xF0009
+#endif
 #ifndef DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE
 #define DP_REPEATER_CONFIGURATION_AND_STATUS_SIZE      0x50
 #endif

diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
index 28843e9882d399fa107201f3aeb88eadc6fef1d6..64e4ae379e34643a47716b1196d4cb2988ef2b4c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
@@ -1502,7 +1502,7 @@ static bool dpcd_read_sink_ext_caps(struct dc_link *link)
 
 enum dc_status dp_retrieve_lttpr_cap(struct dc_link *link)
 {
-       uint8_t lttpr_dpcd_data[8] = {0};
+       uint8_t lttpr_dpcd_data[10] = {0};
        enum dc_status status;
        bool is_lttpr_present;
 
@@ -1552,6 +1552,10 @@ enum dc_status dp_retrieve_lttpr_cap(struct dc_link *link)
                        lttpr_dpcd_data[DP_PHY_REPEATER_128B132B_RATES -
                                                        DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV];
 
+       link->dpcd_caps.lttpr_caps.alpm.raw =
+                       lttpr_dpcd_data[DP_LTTPR_ALPM_CAPABILITIES -
+                                                       DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV];
+
        /* If this chip cap is set, at least one retimer must exist in the chain
         * Override count to 1 if we receive a known bad count (0 or an invalid value) */
        if (((link->chip_caps & AMD_EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK) == AMD_EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) &&