IB/mlx5: Don't mangle the mr->pd inside the rereg callback

The rereg protocol expects the core code to change mr->pd and synchronize
that change with the atomics and syncs. The driver should not touch it.

mlx5 needed to update it in umr_rereg_pas() because
mlx5r_umr_update_mr_pas() required the updated mr->pd to build the
UMR.

Simply switch mlx5r_umr_update_mr_pas() to use the pdn directly from
the new pd and remove the mr->pd update.

Fixes: 56e11d628c5d ("IB/mlx5: Added support for re-registration of MRs")
Link: https://patch.msgid.link/r/7-v1-29ebd2c229b5+fd5-ib_mr_pd_jgg@nvidia.com
Assisted-by: Codex:gpt-5-5
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

diff --git a/drivers/infiniband/hw/mlx5/mr.c b/drivers/infiniband/hw/mlx5/mr.c
index 47f6a13a5f85a6c1ef9d18fe3291c1e3cc56c928..7e2d5219fa3ee1a0d2c815859ebe721724f06b42 100644 (file)
--- a/drivers/infiniband/hw/mlx5/mr.c
+++ b/drivers/infiniband/hw/mlx5/mr.c
@@ -1134,10 +1134,8 @@ static int umr_rereg_pas(struct mlx5_ib_mr *mr, struct ib_pd *pd,
        if (err)
                return err;
 
-       if (flags & IB_MR_REREG_PD) {
-               mr->ibmr.pd = pd;
+       if (flags & IB_MR_REREG_PD)
                upd_flags |= MLX5_IB_UPD_XLT_PD;
-       }
        if (flags & IB_MR_REREG_ACCESS) {
                mr->access_flags = access_flags;
                upd_flags |= MLX5_IB_UPD_XLT_ACCESS;
@@ -1147,7 +1145,7 @@ static int umr_rereg_pas(struct mlx5_ib_mr *mr, struct ib_pd *pd,
        mr->ibmr.length = new_umem->length;
        mr->page_shift = order_base_2(page_size);
        mr->umem = new_umem;
-       err = mlx5r_umr_update_mr_pas(mr, upd_flags, mlx5_mr_pdn(mr));
+       err = mlx5r_umr_update_mr_pas(mr, upd_flags, to_mpd(pd)->pdn);
        if (err) {
                /*
                 * The MR is revoked at this point so there is no issue to free