]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
coresight: tpda: add global_flush_req sysfs node
authorJie Gan <jie.gan@oss.qualcomm.com>
Tue, 23 Dec 2025 10:09:51 +0000 (18:09 +0800)
committerSuzuki K Poulose <suzuki.poulose@arm.com>
Mon, 5 Jan 2026 16:52:34 +0000 (16:52 +0000)
Setting the global_flush_req register to 1 initiates a flush request for
all enabled TPDA input ports. The register remains set until the flush
operation is complete.

Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
[ Fix kernel version in the Documentation ]
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20251223-add_sysfs_nodes_to_configure_tpda-v8-2-4c95db608b62@oss.qualcomm.com
Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda
drivers/hwtracing/coresight/coresight-tpda.c
drivers/hwtracing/coresight/coresight-tpda.h

index 8519a08444abf69ab0beeb80d0f09168964dbb5f..acd354d7bdfa7183d43d3269e10905a59e054cca 100644 (file)
@@ -33,3 +33,11 @@ Contact:     Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qu
 Description:
                (RW) Configure the CMB/MCMB channel mode for all enabled ports.
                Value 0 means raw channel mapping mode. Value 1 means channel pair marking mode.
+
+What:          /sys/bus/coresight/devices/<tpda-name>/global_flush_req
+Date:          December 2025
+KernelVersion: 6.20
+Contact:       Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
+Description:
+               (RW) Set global (all ports) flush request bit. The bit remains set until a
+               global flush request sequence completes.
index 2186223ad33ee19b8355a1b3790db0fd06da4ede..d24a9098f1b1b40923edb5f5a292d52d9c80f6b5 100644 (file)
@@ -341,7 +341,52 @@ static ssize_t tpda_trig_sysfs_store(struct device *dev,
        return size;
 }
 
+static ssize_t global_flush_req_show(struct device *dev,
+                                    struct device_attribute *attr,
+                                    char *buf)
+{
+       struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
+       unsigned long val;
+
+       if (!drvdata->csdev->refcnt)
+               return -EINVAL;
+
+       guard(spinlock)(&drvdata->spinlock);
+       val = readl_relaxed(drvdata->base + TPDA_CR);
+       /* read global_flush_req bit */
+       val &= TPDA_CR_FLREQ;
+
+       return sysfs_emit(buf, "%lu\n", val);
+}
+
+static ssize_t global_flush_req_store(struct device *dev,
+                                     struct device_attribute *attr,
+                                     const char *buf,
+                                     size_t size)
+{
+       struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent);
+       unsigned long val;
+
+       if (kstrtoul(buf, 0, &val))
+               return -EINVAL;
+
+       if (!drvdata->csdev->refcnt || !val)
+               return -EINVAL;
+
+       guard(spinlock)(&drvdata->spinlock);
+       val = readl_relaxed(drvdata->base + TPDA_CR);
+       /* set global_flush_req bit */
+       val |= TPDA_CR_FLREQ;
+       CS_UNLOCK(drvdata->base);
+       writel_relaxed(val, drvdata->base + TPDA_CR);
+       CS_LOCK(drvdata->base);
+
+       return size;
+}
+static DEVICE_ATTR_RW(global_flush_req);
+
 static struct attribute *tpda_attrs[] = {
+       &dev_attr_global_flush_req.attr,
        tpda_trig_sysfs_rw(freq_ts_enable, FREQTS),
        tpda_trig_sysfs_rw(trig_freq_enable, FRIE),
        tpda_trig_sysfs_rw(trig_flag_ts_enable, FLRIE),
index c93732e04af2c2ff6d47f41ccdaee5f87d89dc9a..1cc9253293ec4199244808fc528735cd86187deb 100644 (file)
@@ -10,6 +10,8 @@
 #define TPDA_Pn_CR(n)          (0x004 + (n * 4))
 #define TPDA_FPID_CR           (0x084)
 
+/* Cross trigger global (all ports) flush request bit */
+#define TPDA_CR_FLREQ          BIT(0)
 /* Cross trigger FREQ packets timestamp bit */
 #define TPDA_CR_FREQTS         BIT(2)
 /* Cross trigger FREQ packet request bit */