RISC-V: Support Ssu64xl extension.

Support the Ssu64xl extension, which requires UXLEN to be 64.

gcc/ChangeLog:

	* config/riscv/riscv-ext.def: New extension definition.
	* config/riscv/riscv-ext.opt: New extension mask.
	* doc/riscv-ext.texi: Document the new extension.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/arch-ssu64xl.c: New test.

Signed-off-by: Jiawei <jiawei@iscas.ac.cn>

diff --git a/gcc/config/riscv/riscv-ext.def b/gcc/config/riscv/riscv-ext.def
index 2b34276fb95efbea74ec88312e50beed4ae14096..816acaa34f4aa6cc0bb0285b98dd21ef7c19fd33 100644 (file)
--- a/gcc/config/riscv/riscv-ext.def
+++ b/gcc/config/riscv/riscv-ext.def
@@ -1961,6 +1961,19 @@ DEFINE_RISCV_EXT(
   /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
   /* EXTRA_EXTENSION_FLAGS */ 0)
 
+DEFINE_RISCV_EXT(
+  /* NAME */ ssu64xl,
+  /* UPPERCASE_NAME */ SSU64XL,
+  /* FULL_NAME */ "UXLEN=64 must be supported",
+  /* DESC */ "",
+  /* URL */ ,
+  /* DEP_EXTS */ ({"zicsr"}),
+  /* SUPPORTED_VERSIONS */ ({{1, 0}}),
+  /* FLAG_GROUP */ ss,
+  /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+  /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+  /* EXTRA_EXTENSION_FLAGS */ 0)
+
 DEFINE_RISCV_EXT(
   /* NAME */ supm,
   /* UPPERCASE_NAME */ SUPM,

diff --git a/gcc/config/riscv/riscv-ext.opt b/gcc/config/riscv/riscv-ext.opt
index 8eb447c2dc01a7ccc985277c2ee41e707b2d75ba..9f8c5451d49775fde548b60e88ceafd4f7ed479d 100644 (file)
--- a/gcc/config/riscv/riscv-ext.opt
+++ b/gcc/config/riscv/riscv-ext.opt
@@ -379,6 +379,8 @@ Mask(SSSTRICT) Var(riscv_ss_subext)
 
 Mask(SSDBLTRP) Var(riscv_ss_subext)
 
+Mask(SSU64XL) Var(riscv_ss_subext)
+
 Mask(SUPM) Var(riscv_su_subext)
 
 Mask(SVINVAL) Var(riscv_sv_subext)

diff --git a/gcc/doc/riscv-ext.texi b/gcc/doc/riscv-ext.texi
index fd9cbef1d9dcf52a360f36e2275c8bd3ac979d87..e69a2df768d4b6a11a70eac691c5efc677629947 100644 (file)
--- a/gcc/doc/riscv-ext.texi
+++ b/gcc/doc/riscv-ext.texi
@@ -582,6 +582,10 @@
 @tab 1.0
 @tab Double Trap Extensions
 
+@item ssu64xl
+@tab 1.0
+@tab UXLEN=64 must be supported
+
 @item supm
 @tab 1.0
 @tab supm extension

diff --git a/gcc/testsuite/gcc.target/riscv/arch-ssu64xl.c b/gcc/testsuite/gcc.target/riscv/arch-ssu64xl.c
new file mode 100644 (file)
index 0000000..6e151c1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-ssu64xl.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64i_ssu64xl -mabi=lp64" } */
+int foo()
+{
+}