]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
perf arm_spe: Make a function to get the MIDR
authorJames Clark <james.clark@linaro.org>
Tue, 14 Apr 2026 12:47:59 +0000 (13:47 +0100)
committerArnaldo Carvalho de Melo <acme@redhat.com>
Wed, 6 May 2026 01:02:51 +0000 (22:02 -0300)
We'll need the MIDR to dump IMPDEF events in the next commits so extract
a function for it.

No functional changes intended.

Reviewed-by: Leo Yan <leo.yan@arm.com>
Signed-off-by: James Clark <james.clark@linaro.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: John Garry <john.g.garry@oracle.com>
Cc: Leo Yan <leo.yan@linux.dev>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
tools/perf/util/arm-spe.c

index e5835042acdf7685f95e19665cd45f97ed868275..39046033e1433cff82ef0668074867aba4a462a4 100644 (file)
@@ -972,14 +972,9 @@ static void arm_spe__synth_memory_level(struct arm_spe_queue *speq,
        }
 }
 
-static void arm_spe__synth_ds(struct arm_spe_queue *speq,
-                             const struct arm_spe_record *record,
-                             union perf_mem_data_src *data_src)
+static int arm_spe__get_midr(struct arm_spe *spe, int cpu, u64 *midr)
 {
-       struct arm_spe *spe = speq->spe;
-       u64 *metadata = NULL;
-       u64 midr;
-       unsigned int i;
+       u64 *metadata;
 
        /* Metadata version 1 assumes all CPUs are the same (old behavior) */
        if (spe->metadata_ver == 1) {
@@ -987,15 +982,28 @@ static void arm_spe__synth_ds(struct arm_spe_queue *speq,
 
                pr_warning_once("Old SPE metadata, re-record to improve decode accuracy\n");
                cpuid = perf_env__cpuid(perf_session__env(spe->session));
-               midr = strtol(cpuid, NULL, 16);
-       } else {
-               metadata = arm_spe__get_metadata_by_cpu(spe, speq->cpu);
-               if (!metadata)
-                       return;
-
-               midr = metadata[ARM_SPE_CPU_MIDR];
+               *midr = strtol(cpuid, NULL, 16);
+               return 0;
        }
 
+       metadata = arm_spe__get_metadata_by_cpu(spe, cpu);
+       if (!metadata)
+               return -EINVAL;
+
+       *midr = metadata[ARM_SPE_CPU_MIDR];
+       return 0;
+}
+
+static void arm_spe__synth_ds(struct arm_spe_queue *speq,
+                             const struct arm_spe_record *record,
+                             union perf_mem_data_src *data_src)
+{
+       u64 midr;
+       unsigned int i;
+
+       if (arm_spe__get_midr(speq->spe, speq->cpu, &midr))
+               return;
+
        for (i = 0; i < ARRAY_SIZE(data_source_handles); i++) {
                if (is_midr_in_range_list(midr, data_source_handles[i].midr_ranges)) {
                        return data_source_handles[i].ds_synth(record, data_src);