arm64: dts: qcom: msm8953: Use the header with DSI phy clock IDs

Use the header with DSI phy clock IDs to make code more readable.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-6-73b482a6dd02@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index af4c341e2533ef2cca593e0dc97003334d3fd6b7..4793a60fa946195d3220b6c44dec170d443f56db 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: BSD-3-Clause
 /* Copyright (c) 2022, The Linux Foundation. All rights reserved. */
 
+#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
 #include <dt-bindings/clock/qcom,gcc-msm8953.h>
 #include <dt-bindings/clock/qcom,rpmcc.h>
 #include <dt-bindings/gpio/gpio.h>
@@ -807,10 +808,10 @@
                        #power-domain-cells = <1>;
                        clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
                                 <&sleep_clk>,
-                                <&mdss_dsi0_phy 1>,
-                                <&mdss_dsi0_phy 0>,
-                                <&mdss_dsi1_phy 1>,
-                                <&mdss_dsi1_phy 0>;
+                                <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
+                                <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+                                <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>,
+                                <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>;
                        clock-names = "xo",
                                      "sleep",
                                      "dsi0pll",
@@ -917,8 +918,8 @@
 
                                assigned-clocks = <&gcc BYTE0_CLK_SRC>,
                                                  <&gcc PCLK0_CLK_SRC>;
-                               assigned-clock-parents = <&mdss_dsi0_phy 0>,
-                                                        <&mdss_dsi0_phy 1>;
+                               assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+                                                        <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
 
                                clocks = <&gcc GCC_MDSS_MDP_CLK>,
                                         <&gcc GCC_MDSS_AHB_CLK>,
@@ -987,8 +988,8 @@
 
                                assigned-clocks = <&gcc BYTE1_CLK_SRC>,
                                                  <&gcc PCLK1_CLK_SRC>;
-                               assigned-clock-parents = <&mdss_dsi1_phy 0>,
-                                                        <&mdss_dsi1_phy 1>;
+                               assigned-clock-parents = <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>,
+                                                        <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>;
 
                                clocks = <&gcc GCC_MDSS_MDP_CLK>,
                                         <&gcc GCC_MDSS_AHB_CLK>,