platform/mellanox: mlxbf-pmc: Add support for clock_measure performance block

The HW clock_measure counter info is passed to the driver from ACPI.
Create a new sub-directory for clock_measure events and provide
read access to the user. Writes are blocked since the fields are RO.

Signed-off-by: Shravan Kumar Ramani <shravankr@nvidia.com>
Reviewed-by: David Thompson <davthompson@nvidia.com>
Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>
Link: https://lore.kernel.org/r/6ea0699497479dfde0a52fcb28aef55aee1bbc0b.1736413033.git.shravankr@nvidia.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>

diff --git a/drivers/platform/mellanox/mlxbf-pmc.c b/drivers/platform/mellanox/mlxbf-pmc.c
index 6d3abc438a9d24a6f2fdf2aaae1c58e22ded2807..36a00692347dceaa1c2e462fe075d68acbab66c3 100644 (file)
--- a/drivers/platform/mellanox/mlxbf-pmc.c
+++ b/drivers/platform/mellanox/mlxbf-pmc.c
@@ -862,6 +862,37 @@ static const struct mlxbf_pmc_events mlxbf_pmc_llt_miss_events[] = {
        {75, "HISTOGRAM_HISTOGRAM_BIN9"},
 };
 
+static const struct mlxbf_pmc_events mlxbf_pmc_clock_events[] = {
+       { 0x0, "FMON_CLK_LAST_COUNT_PLL_D1_INST0" },
+       { 0x4, "REFERENCE_WINDOW_WIDTH_PLL_D1_INST0" },
+       { 0x8, "FMON_CLK_LAST_COUNT_PLL_D1_INST1" },
+       { 0xc, "REFERENCE_WINDOW_WIDTH_PLL_D1_INST1" },
+       { 0x10, "FMON_CLK_LAST_COUNT_PLL_G1" },
+       { 0x14, "REFERENCE_WINDOW_WIDTH_PLL_G1" },
+       { 0x18, "FMON_CLK_LAST_COUNT_PLL_W1" },
+       { 0x1c, "REFERENCE_WINDOW_WIDTH_PLL_W1" },
+       { 0x20, "FMON_CLK_LAST_COUNT_PLL_T1" },
+       { 0x24, "REFERENCE_WINDOW_WIDTH_PLL_T1" },
+       { 0x28, "FMON_CLK_LAST_COUNT_PLL_A0" },
+       { 0x2c, "REFERENCE_WINDOW_WIDTH_PLL_A0" },
+       { 0x30, "FMON_CLK_LAST_COUNT_PLL_C0" },
+       { 0x34, "REFERENCE_WINDOW_WIDTH_PLL_C0" },
+       { 0x38, "FMON_CLK_LAST_COUNT_PLL_N1" },
+       { 0x3c, "REFERENCE_WINDOW_WIDTH_PLL_N1" },
+       { 0x40, "FMON_CLK_LAST_COUNT_PLL_I1" },
+       { 0x44, "REFERENCE_WINDOW_WIDTH_PLL_I1" },
+       { 0x48, "FMON_CLK_LAST_COUNT_PLL_R1" },
+       { 0x4c, "REFERENCE_WINDOW_WIDTH_PLL_R1" },
+       { 0x50, "FMON_CLK_LAST_COUNT_PLL_P1" },
+       { 0x54, "REFERENCE_WINDOW_WIDTH_PLL_P1" },
+       { 0x58, "FMON_CLK_LAST_COUNT_REF_100_INST0" },
+       { 0x5c, "REFERENCE_WINDOW_WIDTH_REF_100_INST0" },
+       { 0x60, "FMON_CLK_LAST_COUNT_REF_100_INST1" },
+       { 0x64, "REFERENCE_WINDOW_WIDTH_REF_100_INST1" },
+       { 0x68, "FMON_CLK_LAST_COUNT_REF_156" },
+       { 0x6c, "REFERENCE_WINDOW_WIDTH_REF_156" },
+};
+
 static struct mlxbf_pmc_context *pmc;
 
 /* UUID used to probe ATF service. */
@@ -1035,6 +1066,9 @@ static const struct mlxbf_pmc_events *mlxbf_pmc_event_list(const char *blk, size
        } else if (strstr(blk, "llt")) {
                events = mlxbf_pmc_llt_events;
                size = ARRAY_SIZE(mlxbf_pmc_llt_events);
+       } else if (strstr(blk, "clock_measure")) {
+               events = mlxbf_pmc_clock_events;
+               size = ARRAY_SIZE(mlxbf_pmc_clock_events);
        } else {
                events = NULL;
                size = 0;
@@ -1469,14 +1503,15 @@ static int mlxbf_pmc_read_event(unsigned int blk_num, u32 cnt_num, bool is_l3, u
 /* Method to read a register */
 static int mlxbf_pmc_read_reg(unsigned int blk_num, u32 offset, u64 *result)
 {
-       u32 ecc_out;
+       u32 reg;
 
-       if (strstr(pmc->block_name[blk_num], "ecc")) {
+       if ((strstr(pmc->block_name[blk_num], "ecc")) ||
+           (strstr(pmc->block_name[blk_num], "clock_measure"))) {
                if (mlxbf_pmc_readl(pmc->block[blk_num].mmio_base + offset,
-                                   &ecc_out))
+                                   &reg))
                        return -EFAULT;
 
-               *result = ecc_out;
+               *result = reg;
                return 0;
        }
 
@@ -1490,6 +1525,9 @@ static int mlxbf_pmc_read_reg(unsigned int blk_num, u32 offset, u64 *result)
 /* Method to write to a register */
 static int mlxbf_pmc_write_reg(unsigned int blk_num, u32 offset, u64 data)
 {
+       if (strstr(pmc->block_name[blk_num], "clock_measure"))
+               return -EINVAL;
+
        if (strstr(pmc->block_name[blk_num], "ecc")) {
                return mlxbf_pmc_write(pmc->block[blk_num].mmio_base + offset,
                                       MLXBF_PMC_WRITE_REG_32, data);